“Our highly sensitive ADC circuits have a very tight tolerance and we found that only Silicon Frontline’s F3D was capable of delivering the results we needed with exceptional performance and the required accuracy,” said Dr. Yu, Director of Faraday. “The matching of differential signals is critical in analog designs and F3D was able to highlight if and when any differences occurred.”
Silicon Frontline’s post-layout verification software delivers guaranteed accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy range for better design quality.
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