Field-solver extensions for Altium Designer address high-speed design
Altium Limited, in cooperation with Australian based In-Circuit Design (ICD), has developed extensions for Altium Designer for advanced stackup planning and power distribution network analysis to bring comprehensive high-speed design capabilities to the mainstream market, at an affordable price.
With the increasing challenges concerning high-speed signals – not only because of high clock frequencies, but also because of faster edge rates – more and more PCB designers need to have analysis tools that allow them to successfully design with fewer iterations. The two new extensions for Altium Designer, the ICD Stackup Planner and ICD Power Distribution Network (PDN) Planner, are accessible from within the design tool to provide for seamless analysis.
ICD provides a centralised, shared, impedance planning environment that connects materials, PDN analysis, stackup planning, signal integrity, PCB design and fabrication, consolidating the impedance control from schematic to fabrication. The impedance is planned pre-layout and flows through the design process to fabrication.
Attention to critical placement, fanout, matched length and differential pair routing are vital for more and more mainstream designs. However, planning the multilayer PCB stackup configuration is one of the most important aspects in achieving the best possible performance of a product. The ICD Stackup Planner offers simulation speed, ease of use and accuracy at an affordable price. Accurate impedance control for rigid-flex design flows seamlessly, in the Altium environment, from concept to fabrication. The 8,800 part dielectric materials library allows the simulation of the actual materials used by your fabricator. The tool implements a field solver computation of multiple differential pair definitions per layer, leading to automatic creation of high-speed design rules in Altium Designer.
A typical high-speed, multilayer PCB has five or six individual power supplies that all serve a different purpose, and must be regulated to maintain power integrity during high current switching up to the maximum frequency. With a frequency range up to 100 GHz, the ICD PDN Planner analyses the AC impedance of each on-board PDN, including capacitor selection, to ensure a broad spectrum of noise reduction, giving a concise graphical view of the entire network including plane resonance peaks. ICD PDN Planner has a comprehensive capacitor library of 5,000 parts, allows the simulation and optimisation of the actual capacitors extracted from manufacturer’s SPICE models. It is intuitive, giving all members of a PCB design team the ability to quickly analyse power integrity without the usual steep learning curve associated with complex software.
Altium; www.altium.com
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