First 2nm silicon targets AI infrastructure

First 2nm silicon targets AI infrastructure

Business news |
By Nick Flaherty

Marvell has announced a 2nm chip platform with TSMC for data centre and AI applications.

The company has extended its deal with TSMC which saw Marvell launch 5nm chips in 2020 and 3nm devices in 2023 to to 2nm process technologies.

The 2nm platform uses IP for high-speed long-reach SerDes at speeds beyond 200 Gbps, processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of high-bandwidth physical layer interfaces for compute, memory, networking and storage architectures.

These technologies will serve as the foundation for producing cloud-optimized custom compute accelerators, Ethernet switches, optical and copper interconnect digital signal processors, and other devices for powering AI clusters, cloud data centres and other accelerated infrastructure.

“We take a modular approach to semiconductor design R&D, focusing first on qualifying foundational analog, mixed-signal IP and advanced packaging that can be used across a broad spectrum of devices,” said Sandeep Bharathi, chief development officer at Marvell.

Interconnect and advanced packaging is also key for accelerated infrastructure with the use of chiplets. The developments at the platform level alleviate data bottlenecks that can hinder performance of the entire system as well as reduce the cost and time-to-market for multichip designs for running the most complex applications.

The company has not put a timescale on the first silicon, but TSMC is planning early production of 2nm by the end of this yar at its fab on the Baoshan campus of the Hsinchu Science Park in Taiwan.

“Tomorrow’s artificial intelligence workloads will require significant and substantial gains in performance, power, area, and transistor density. The 2nm platform will enable Marvell to deliver highly differentiated analog, mixed-signal, and foundational IP to build accelerated infrastructure capable of delivering on the promise of AI,” said Bharathi. “Our partnership with TSMC on our 5nm, 3nm and now 2nm platforms has been instrumental in helping Marvell expand the boundaries of what can be achieved in silicon.”

“TSMC is pleased to collaborate with Marvell in pioneering a platform for advancing accelerated infrastructure on our 2nm process technology,” said Kevin Zhang, senior vice president of business development at TSMC. “We are looking forward to our continued collaboration with Marvell in the development of leading-edge connectivity and compute products utilizing TSMC’s best-in-class process and packaging technologies.”

Marvell moved from being a fast follower with  its 5nm platform, producing several 5nm designs and launching the first portfolio for infrastructure silicon on TSMC 3nm processes.


If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News


Linked Articles