First 8-lane analyzer for PCIe 5.0
Viavi Solutions has launched the industry’s first 8-lane analyser for the latest PCI Express PCIe 5.0 standard.
PCIe 5.0 doubles data capacity over a PCIe link to 32 gigabits per second per unidirectional channel, or greater than one terabit per second across the common 16-lane bidirectional slot interface. This acceleration of speed correlates with the performance demands of emerging bandwidth- and compute-intensive applications such as 400 Gigabit Ethernet, IoT, hyperscale and artificial intelligence (AI).
Component manufacturers need test platforms that will validate performance according to the standard, while maintaining familiar user interfaces and management environments to minimize training needs and startup costs.
Viavi’s Xgig 5P8 analyszer platform provides protocol analysis for PCIe 5.0 traffic at all layers of the protocol stack. It supports link widths up to 8 lanes, and link speeds to 32 GT/s with both PCIe and NVMe protocol analysis functions, and full downward compatibility to PCIe 4.0. It also connects with other VIAVI analyzers designed for Ethernet, SAS and FibreChannel to provide time correlated multiprotocol views.
The chassis has 128 GB of memory and flexible allocation to capture and save multiple data traces. The chassis also provides advanced PCIe and NVMe level trigger and search capabilities designed to speed debug and problem resolution time. Interposer autotuning greatly simplifies and speeds system use, and enables repeatable capture results.
“PCIe 5.0 is the protocol designed to support the emerging future of data communications,” said Tom Fawcett, Vice President and General Manager, Lab and Production Business Unit at Viavi. “We’ve understood this through our work with the leading players and industry bodies in this space. As a result, the Xgig 5P8 is ready out of the gate to support the range of capacities and test cases developers and manufacturers require to ensure their products meet standard performance specifications.”
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