First commercial PCIe Gen5.0 data centre switch chip

First commercial PCIe Gen5.0 data centre switch chip

New Products |
By Nick Flaherty

Microchip Technology has launched the industry’s first commercial switch chip for the latest PCI Express Gen5.0 standard.

The Switchtec PFX PCIe 5.0 chip doubles data rates over the previous PCIe 4.0 generation and is aimed at data centre infrastructure for applications such as data analytics, autonomous-driving and medical diagnostics are driving extraordinary demands for machine learning and hyperscale compute infrastructure.

Together with the XpressConnect retimers, Microchip is the industry’s only supplier of interoperable PCIe Gen 5 switches and PCIe Gen 5 retimers for end-to-end designs up to 32 Gtransaction/s. Other ASICs and FPGAs have been developed for customers to support PCI Gen5.

“Accelerators, graphic processing units (GPUs), central processing units (CPUs) and high-speed network adapters continue to drive the need for higher performance PCIe infrastructure. Microchip’s introduction of the world’s first PCIe 5.0 switch doubles the PCIe Gen 4 interconnect link rates to 32 GT/s to support the most demanding next-generation machine learning platforms,” said Andrew Dieckmann, associate vice president of marketing and applications engineering for Microchip’s data centre solutions business unit.

The Switchtec PFX PCIe 5.0 switch family provides from 28 to 100 lanes and up to 48 non-transparent bridges (NTBs) with a data rate of . It also supports hot-and surprise-plug as well as secure boot authentication.

The PFX PCIe 5.0 switch includes debug and diagnostic features including internal PCIe analyzers supporting Transaction Layer Packet (TLP) generation and analysis and on-chip non-obtrusive SerDes eye capture capabilities.

Developers can use the ChipLink graphical user interface (GUI) configuration and topology viewer that provides full access to the PFX PCIe switch’s registers, counters, diagnostics and forensic capture capabilities.

“Intel’s upcoming Sapphire Rapids Xeon processors will implement PCI Express 5.0 and Compute Express Link running up to 32.0 GT/s to deliver the low-latency and high-bandwidth I/O solutions our customers need to deploy,” said Dr. Debendra Das Sharma, Intel fellow and director of I/O technology and standards. “We are pleased to see Microchip’s PCIe 5.0 switch and retimer investment strengthen the ecosystem and drive broader deployment of PCIe 5.0 and CXL enabled solutions.”

Microchip has released a full set of  reference designs, evaluation boards and tools to support customers building systems that take advantage of the high-bandwidth of PCIe 5.0.

The Switchtec PFX PCIe 5.0 family of switches are sampling now to qualified customers.

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