First crossbar ReRAM array with selector
Working with CEA-Leti in France, Israeli developer Weebit Nano has developed a “kilobit” scale crossbar array using ReRAM resistive memory technology.
The crossbar is implemented on a relatively modest 130nm manufacturing process but is described as an important milestone in progress towards making large stand-alone non-volatile memories. The nature of the selector was not disclosed by Weebit but is likely to be an ovonic threshold switch (OTS). Weebit demonstrated the integration of an OTS selector with its oxide-based ReRAM nonvolatile memory in June 2021
The OTS is usually a germanium-selenium diode-switch based on an electrode cross-point so it can sit under or above the memory cell being selected. The selector serves a key role in two-terminal memories in that it selects the memory cell being addressed and prevents sneak paths through the array bypassing the selected cell.
Embedded arrays make use of a 1T1R (one transistor one resistor) architecture but because of the area taken up by a transistor and extra wiring this takes up too much space to support high-capacity and high-density stand-alone arrays. Hence the use of the more easily-integrated selector to contain megabits and up to gigabits of memory on the same piece of silicon.
Such an architecture also allows Weebit’s arrays to be stacked in 3D layers so they can deliver even higher densities.
Weebit’s 1S1R crossbar ReRAM architecture has potential applications in storage class memory, persistent memory and as a NOR flash replacement. It is also suitable for AI architecture such as in-memory computing and neuromorphic computing.
“Weebit Nano continues to make significant technical and commercial progress within the embedded sector – recently successfully scaling our ReRAM technology down to 28nm,” said Coby Hanoch, CEO of Weebit, in a statement. “Now, with the creation of our first kilobit crossbar arrays, which combine our ReRAM technology with CEA-Leti’s selector technology, we’re continuing our progress toward discrete memory solutions.”
“Developing such a crossbar array is a very innovative process that requires significant research. As part of this work, we recently filed several new patents together with CEA-Leti, designed to further protect Weebit’s ReRAM intellectual property, with a focus on 1S1R architectures and selector cell programming.”
A spokesperson for Weebit said that the team is focused on growing the array sizes toward commercial scale but that discrete chips are Weebit’s mid-term goal. “In the short term, our roadmap is focused on the embedded market, where we are also making significant progress,” the spokesperson said.
Related links and articles:
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- Weebit Nano puts silicon-oxide ReRAM on 28nm FDSOI
- SkyWater foundry to take Weebit ReRAM to volume
- Weebit, Leti file multi-level ReRAM programming patent
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