First MIPI SWI3S manager and peripheral controller IP
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Arasan Chip Systems has announced the immediate availability of the industry’s first MIPI SWI3S Manager IP and SWI3S Peripheral IP cores. With an extremely low gate count, SWI3S (SoundWire I3S Interface) IP gate count can target applications such as microphones while also ensuring low latency.
SWI3S IP joins an extensive MIPI IP portfolio from Arasan, which includes its Soundwire IP, CSI, DSI, CDPHY and DPHY IP. Arasan is a leading provider of IP for the MIPI standards and has been an executive member of the MIPI Association since 2005.
The MIPI SWI3S IP is used to connect digital audio components such as digital microphones, audio codecs, amplifiers, headsets and docking audio products, DSPs, amongst others, on mobile devices.
Features of SoundWire I3S IP include fewer wires, simplifying PCB layout and lower power, making it ideal for battery-powered devices. High bandwidth enables the handling of multi-channel high-resolution audio, while integrated control and audio means no separate control bus is needed.
The SWI3S Manager IP and SWI3S Peripheral Controller Core IP implement the link protocol to communicate in a half-duplex fashion to transfer the audio streams and the control information together. One or more SWI3S Peripheral IPs can be connected specific to the application.
SWI3S IP block diagram.
“Arasan offers a focused portfolio of IP products and services targeting the Mobile SoC market, and it is imperative to our business that we are the first while also ensuring compliance with the standards. We are first again with our SWI3S IP,” said Ron Mabry, VP of Sales at Arasan.
www.arasan.com/product/swi3s-manager-core-ip
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