First monolithic quad band satellite receiver for industrial, automotive
STMicroelectronics has used its developed the first quad band monolithic satellite navigation receiver for automotive and industrial applications
The Teseo VI multi-constellation design provides precise GNSS positioning accurate to a few centimetres on a single die and is the first with dual ARM Cortex-M7 controller cores.
The VI STA8600A supports dead reckoning automotive way (TESEO-DRAW) and dead reckoning unplugged mode (Teseo-DRUM) to ensure high-accuracy positioning in harsh environments such as tunnels, garages, and deep urban areas. The VI+ ST8610A gives enough resources to support the RTK/PPP precision algorithms on chip with the two M7 cores.
The Teseo APP2 STA9200MA operates the dual cores in lockstep, providing hardware redundancy for applications such as road vehicle guidance meeting ISO 26262 ASIL-B functional safety. Pin-compatibility between Teseo APP2 and other Teseo VI ICs simplifies PCB design for companies producing ASIL-certified and non-ASIL applications.
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All the variants feature ST’s RF architecture and GNSS baseband design for the quad-band GNSS support (L1, L2, L5 and E6) with the unique ability to acquire and track only L5. This is highly effective in reducing outliers and increasing robustness in difficult conditions such as urban canyons and in the presence of jammers.
The TeseoVI also supports the open service navigation message authentication (OSNMA) from the Galileo constellation. This prevents spoofing attacks by cryptographically authenticating the source of a message using a message authentication code (MAC) to guarantee the authenticity of a signal’s provenance. It doesn’t encrypt the whole message but sends a series of codes, which is a far more efficient use of the bandwidth.
As Galileo generates the code, hackers can’t fake it, and as the standard sends multiple codes over time, hackers can’t just grab one key and reuse it in a replay attack before the code expires.
For the automotive industry, Teseo VI chips and modules will be core building blocks of advanced driving systems (ADAS), smart in-vehicle systems, and safety-critical applications such as autonomous driving. The devices have also been designed to improve positioning capabilities in multiple industrial applications including asset trackers, mobile robots for home deliveries, managing machinery and crop monitoring in smart agriculture and for timing systems such as base stations.
“Our Teseo VI receivers represent a real breakthrough among positioning engines for several reasons: they are the first to integrate multi-constellation and quad-band signal processing in a single die; they are the first with a dual ARM core architecture for ASIL-level safety for assisted and autonomous driving applications,” said Luca Celant, Digital Audio and Signal Solutions General Manager, STMicroelectronics.
The integration in the satellite receiver chips is enabled by embedding ST’s proprietary embedded Non-Volatile-Memory (PCM) with a small cell architecture that can withstand harsh automotive environments to avoid the need for external memory.
The Teseo VI+ can also host various enhanced positioning engines, developed independently by third ST Authorized Partner companies, to provide complete real-time kinematics for centimetre position accuracy.
The devices all contain a full set of hardware cyber security features including secure boot, over-the-air firmware update, and output-data protection. In addition, ST’s hardware security module (HSM) provides robust protection against online hacking. The devices comply with the latest UNECE R155 and ISO 21434 specifications that mandate cybersecurity by design. The family also has support for algorithms, reference designs, and compatible complementary hardware.
The Teseo VI GNSS satellite receiver family includes also two new GNSS automotive modules: the Teseo-VIC6A in a 16mm x 12mm form factor (embedding Teseo VI), and the Teseo-ELE6A in a 17mm x 22mm form factor (embedding the Teseo VI+). These modules simplify the integration of Teseo VI/VI+ ICs on the customer platform and ensure optimum performance.
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