First nano-ridge GaAs lasers integrated into CMOS chip
imec in Belgium has integrated GaAs laser diodes into silicon devices on 300mm wafers for the first time.
Achieving room-temperature continuous-wave lasing with threshold currents as low as 5 mA and output powers exceeding 1 mW, the results demonstrate the potential of direct epitaxial growth of high-quality III-V materials on silicon. This is a breakthrough for cost-effective, high-performance optical devices for applications in data communications, machine learning and artificial intelligence. Integrating the lasers into silicon chips provides more options for chiplet and chip-to-chip interconnect.
The lack of highly scalable, native CMOS-integrated light sources has been a major roadblock for the widespread adoption of silicon photonics. This has led to hybrid or heterogeneous integration approaches, such as flip-chip, micro-transfer printing or die-to-wafer bonding, involve complex bonding processes or the need for expensive III-V substrates which are often
discarded after processing. This not only increases costs but also raises concerns about sustainability and resource efficiency.
- High power laser son 6in GaAs wafers
- III-V lasers on 200mm CMOS silicon wafers
- Quad lasers for 800Gbit/s data links
One of the main problems is the large mismatch in crystal lattice parameters and thermal expansion coefficients between III-V and silicon materials. This creates crystal defects, which compromise laser performance and reliability. Selective-area growth (SAG) combined with aspect-ratio trapping (ART) significantly reduces defects in III-V materials integrated on silicon by confining dislocations within narrow trenches etched in a dielectric mask, or nano-ridges.
The electrically-driven GaAs multi-quantum-well nano-ridge laser diodes are monolithically fabricated on 300mm silicon wafers in the imec CMOS pilot prototyping line. At 1020nm, these lasers can provide optical communications.
“Over the past years, imec has pioneered nano-ridge engineering, a technique that builds on SAG and ART to grow low-defectivity III-V nano-ridges outside the trenches. This approach not only further reduces defects but also enables precise control over material dimensions and composition,” said Bernardette Kunert, scientific director at imec.
The nano-ridge structures typically feature dislocation densities well below 105 defects/cm2, enabling lasing in the InGaAs multiple quantum wells (MQWs) used as the optical gain region, embedded in an in-situ doped p-i-n diode and passivated with an InGaP capping layer. Achieving room-temperature, continuous-wave operation with electrical injection is a major advancement, overcoming challenges in current delivery and interface engineering.
The devices show lasing at ~1020 nm with threshold currents as low as 5 mA, slope efficiencies up to 0.5 W/A, and optical powers reaching 1.75 mW,
“imec exploited the III-V nano-ridge engineering concept to demonstrate the first full wafer-scale fabrication of electrically pumped GaAs-based lasers on standard 300 mm silicon wafers, entirely within a CMOS pilot manufacturing line,” she said.
“The cost-effective integration of high-quality III-V gain materials on large-diameter Si wafers is a key enabler for next-generation silicon photonics applications. These exciting nano-ridge laser results represent a significant milestone in using direct epitaxial growth for monolithic III-V integration,” said Joris Van Campenhout, Fellow Silicon Photonics and Director of the industry-affiliation R&D programme on Optical I/O at imec.
The project is part of a larger pathfinding mission at imec to advance III-V integration processes towards higher technological readiness, from flip-chip and transfer-printing hybrid techniques in the near term, over heterogeneous wafer- and die-bonding technologies and eventually direct epitaxial growth in the longer term.
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