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First QML-V space qualification for FPGA with lead-free flip chip bumps

First QML-V space qualification for FPGA with lead-free flip chip bumps

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By Nick Flaherty



A Radiation-Tolerant (RT) Field- Programmable Gate Array (FPGA) with lead-free flip-chip bump packaging has achieved the highest level of qualification for space design for the first time.

The RTG4 from Microchip Technology is the first FPGA with lead-free bumps to earn the Qualified Manufacturers List (QML) Class V status for the most critical space missions such as human-rated, deep space and national security programmes.

In 2018, RTG4 FPGAs became the first RT FPGAs offering more than 150,000 logic elements to achieve a QML Class V qualification, and this next-generation solution with lead-free flip-chip bumps is the first of its kind to achieve QML Class V status.

In advanced flip-chip package construction, such as that used in the RTG4 FPGA, flip-chip bumps are used to connect the silicon die and the package substrate. Lead-free bump material will help extend the longevity of the product, which is critical to space missions but has to show the high level of reliability required for critical space missions.

“This is another milestone for our RTG4 FPGAs that will provide customers with added confidence in designing these devices in space flight systems, while allowing them to take advantage of our high-reliability, zero-configuration-upset and low-power consumption FPGAs,” said Bruce Weyer, corporate vice president for Microchip’s FPGA business unit. “For more than 60 years, Microchip solutions have powered space flight missions, and we are dedicated to product longevity and providing the highest quality solutions.”

The RTG4 FPGAs use a flash memory technology rather than SRAM memories to provide a low static power consumption and immunity to configuration upsets.

To achieve QML Class V qualification, the RTG4 FPGA with lead-free bump has undergone extensive reliability testing, enduring up to 2,000 thermal cycles from −65°C to 150°C junction temperature. The lead-free flip-chip bump interface connections passed MIL-PRF-38535 inspection criteria and exhibited no signs of tin whiskers. The flip-chip bump is inside the FPGA package, so there is no impact on the user’s design, reflow profile, thermal management or board assembly flow when converting to lead-free bump RTG4 FPGAs.

Microchip has a wide range of radiation-hardened and RT devices that include QML Class Q RT PolarFire® FPGAs and sub-QML FPGAs that bridge the gap between traditional Qualified Manufacturers List (QML) components and Commercial Off-The-Shelf (COTS) components.

The RTG4 FPGAs are supported by development kits, mechanical samples and daisy chain packages for board validation and testing. Libero® SoC Design Suite enables RTL entry through programming and includes a rich IP library, complete reference designs and development kits.

DLA Cross Reference Guide; www.microchip.com

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