First steps to European multicore RISC-V chip for space

First steps to European multicore RISC-V chip for space
Technology News |
The De-risc project has shown the first milestones for a purely European multicore RISC-V processor for satellite, spavce and HAPS designs
By Nick Flaherty

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The first steps to a European version of a RISC-V multicore processor design for space and aerospace applications have been demonstrated.

The three year, €3.4m De-Risc project is part of the European Horizon 2020 programme. It brings together Thales, Cobham Gaisler, the Barcelona Supercomputer centre and software house FENtiss to develop open source hardware and software for space applications as well as high altitude pseudo-satellites (HAPS). These are drones or balloons that fly at altitudes over 20km for surveillance, monitoring and cellular basestations.

By March 2020 the project aims to deliver a full, European-sourced Integrated Modular Avionics hardware and software platform.

In the first year, the project has developed the first version of the De-RISC MPSoC platform and the Performance Monitoring Unit, integrating observability (Cycle Contention Stack, Request Duration Counter) and controllability capabilities (Maximum-Contention Control Unit) for a fault tolerant design.

Cobham Gailer in Sweden has extensive experience in the area, having developed the widely used LEON processor, which is based around the SPARC V8 architecture. The following LEON2 processor was designed under contract from the European Space Agency, and is available as a radiation-hardened chip from Microchip as the AT697 and AT791. The project is using Gailer’s NOEL-V (LEON backwards) existing 64bit RISC-V processor in VHDL that shares many elements with the latest LEON5 core as the basis for the multicore design.

The group has also ported the first prototype of the Fentis XtratuM XNG Hypervisor and LithOS ‘para’virtualised’ operating system to the NOEL-V processor.  The XtratuM XNG Hypervisor has been used already in the OneWeb satellite constellation, the PLATINO generic satellite for constellations, and ARGOS-NEO ANGELS, EyeSat, SVOM, JUICE and MMX.

The use case for the platform design is TM/TC (telemetry and telecommand) applications in a satellite or HAPS system. A packet-based datalink requires low-latency processing for critical telemetry, decryption of telecommands and encryption of telemetry, to protect against unauthorized control of the satellite and image compression and/or lossless data compression.

This allows the assessment of both time-critical and cybersecurity aspects of the platform, as well as overall performance and data throughput. The test application will be configurable, e.g. in data size, to focus on each of those aspects, but the low-level communication protocol will not be included. In addition, synthetic benchmarks and stress applications will be used to assess the sensitivity of the platform to timing interference

The project is using the Stratobus project by Thales Alenia Space, a stratospheric HAPS balloon that has both space and aviation requirements.

The next software tasks include porting of RTEMS, a free open source real-time operating system, as guest operating system of XtratuM XNG, and the upgrade of the software development tools to support XNG and LithOS on NOEL-V.

derisc-project.eu

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