Flex Logix Technologies is licensing its InferX machine learning and AI technology for the first time, running on its embedded FPGA blocks implemented in customer chips.
Available in early 2023, device manufacturers and systems companies who design chips can now license Flex Logix’s InferX AI technology for AI inference. This will provide broader access to the company’s eFPGA and edge inference IP solutions, says the company.
Launched four years ago, the InferX technology has moved from initial design to 16nm production for a eFPGA chip from Flex. The company is now licensing this to customers. The IP supports process nodes from 180nm to 7nm with other nodes on short notice.
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“We are pleased to also offer our customers AI IP along with a high efficiency automated compiler,” said Geoff Tate, Co-Founder and CEO at Flex Logix. “We have nearly 40 chips under license utilizing our EFLX eFPGA IP, with more than 20 of them working in silicon, all first time. Flex Logix’s license partners are poised to make reconfigurable computing ubiquitous over the coming decades – through both embedded FPGA and edge inference applications.”
“Flex Logix has proven it can move from strength to strength, powering its partner ecosystem through IP licensing,” said Peter Hebert, Co-Founder and Managing Partner of Lux Capital. “Lux, alongside our partners at Mithril Capital and Eclipse, continues to invest to help Flex Logix become the Arm for reconfigurable computing.”
“There are a very small number of people in the world that have built multi-billion dollar companies in semiconductor IP – founding Rambus CEO and now Flex Logix CEO Geoff Tate is one of them,” said Ajay Royan, Founder and Managing General Partner of Mithril Capital, which led the company’s Series D round of financing. “Flex Logix’s decision to open up access to its InferX technology will drive compelling performance and cost benefits to more end users, sooner. We are strong supporters of the company’s more aggressive market penetration strategy.”
The Flex Logix eFPGA enables volume FPGA users to integrate the FPGA into their companion SoC, resulting in a 5-10x reduction in the cost and power of the FPGA and increasing compute density. This is aimed at communications, networking, data centres, microcontrollers and other applications.
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