Lattice Semiconductor Corp. (Hillsboro, Oregon) has also announced it is sampling the first products designed on that platform; the Crosslink-NX devices. Lattice’s earlier FPGAs were on 40nm CMOS and manufactured for the company by Fujitsu.
Lattice has said it can make use of the back-bias technique available within FDSOI to tune the threshold voltage and deliver enhanced power efficiency. This will help Nexus FPGAs to target such applications as AI for IoT, video, hardware security, embedded vision, 5G infrastructure and industrial/automotive automation.
The migration to 28nm FDSOI allows the die to include additional peripheral features on board while maintaining a small package size and on-board footprint, according to Gordon Hands, director of product marketing at Lattice.
However, Lattice is going with an SRAM-based design rather than using non-volatile memory as it did in some earlier FPGAs. This means that separate non-volatile memory is required to hold the configuration of the FPGA ready for power-up.
Another benefit of the move to FDSOI is a reduced likelihood of soft errors. These are dealt with by error correction circuitry on conventional SRAM-based FPGAs.
First two FPGAs on FDSOI; other ranges to follow. Source: Lattice Semiconductor
The CrossLink-NX family has a novel Lattice-designed FPGA fabric architecture and are being offered with 17,000 and 39,000 six-input look-up tables. The combination of technologies offers about 75 percent reduction in power consumption compared with similar sized FPGAs.
Additional features include numerous high-speed I/Os, including MIPI, PCIe and DDR3 memory, and a high memory to logic ratio to better support AI inferencing in Edge devices, CrossLink-NX features 170 bits of memory for every logic cell.
Lattice is releasing CrossLink-NX ahead of schedule and is already sampling devices with select customers.
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