FPGAs solve core IoT challenges

FPGAs solve core IoT challenges

Feature articles |
By Rich Pell

Smart, connected devices, and the IoT ecosystem they are helping to create, promise to transform everyday life. For individual consumers that might mean making devices more efficient and cost effective for their daily tasks, keeping them safer, or even helping ensure they live healthier lives. For businesses, the IoT promises significant advantages in terms of automation, energy efficiency, asset tracking and inventory control, shipping and location, security, individual tracking, and energy conservation.

But to reach the tens of billions of devices projected to make up the IoT, designers will have to overcome significant implementation challenges. Some of the key among them will be making IoT devices power efficient, handling incompatible interfaces, and providing a processing growth path to handle the inevitable increase in device performance requirements. An FPGA-based design approach can help address such challenges.

Challenge 1 – Power Efficiency
The IoT is a powerful concept with capabilities promising to literally transform the way society lives and works. In fact, development is currently underway in a variety of areas that will make many things look very different than they are today—and not just from a consumer perspective.

Consider, for example, that wearable devices like the Nike FuelBand often require eight or nine components such as the processor, the wireless module, memory, a display, eight sensors, and a USB interface. Over the next few years, component counts may drop, but the complexity and transistor count of the three or four remaining components will grow rapidly as more memory and processing power is required, and as screen resolutions and brightness increase.

Achieving an energy efficiency that will enable IoT devices to run for years on a single battery will not be an easy task. It demands the use of low-power components and more efficient power systems. And, it will require changes at both the architectural and silicon level.

Today, virtually every aspect of the IoT device’s design is focused on making sure it is as energy efficient as possible (Figure 1). For a smartphone, for example, that might mean making it an order of magnitude better, but this won’t happen overnight. On the contrary, it will happen in steps over multiple generations of products. IoT devices must be created with energy efficiency as a prime concern at all levels.

Most IoT applications are required to be “Always-On”. In the most minimalistic example, the IoT terminal is in a standby mode, waiting for some human interaction to wake it up. Yet if an active processor is used to monitor the device for user interaction, the device will consume significant power. The main processor, the processor core in the wireless module, and the display are the biggest consumers of power. In IoT terminals, unique approaches must therefore be employed to minimize the power profile.

One aproach provides “always-on” solutions using a small, low-power FPGA to monitor sensors, buttons, or even voice commands. The processors, wireless modules, and displays can be left in a standby mode until the FPGA determines the user’s need to “wake-up” the terminal and provide service.

In addition to low power, this architecture enables modal state power management with some granularity on what mode the device is actually in—is it on or off, is it sleeping or partially awake—allowing it to dynamically go from one phase to another. This approach offers significant power savings, resulting in longer battery life, longer display lifetime, and lower thermal radiation.

Figure 1. Monitoring sensors while processor is asleep

Challenge 2 – Incompatible Interfaces
Any IoT product will consist of several subsystems with unique functions. Depending upon requirements, there are many choices of components for each of these subsystems. In many cases, however, designers are forced into selecting components solely based on interface compatibility.

For example, changing the processor at the heart of any IoT product design can extremely costly in terms of time and human resource due to the need to retarget code, test, and recertify form, fit, and function. Yet, if you wish to change to a new wireless module because it’s cheaper or has some new feature, but it uses a new serial interface that your processor cannot support, do you change your processor, or is there a solution to bridge these two interfaces for a low cost and without making the product larger? Fortunately, there is a solution: using a very small, low cost FPGAs to bridge the interfaces.

There are numerous reference designs for the bridging of different interfaces. These FPGA-based solutions solve problems like interfacing with an image sensor when the processor does not support SubLVDS, CSI-2, or HiSPI. Or the implementation of a low-cost display with a processor that only has a SPI output for video. FPGAs can solve that problem and still preserve cost savings and form factors. See some examples in Figures 2 through 5 below.

Figure 2. Embedded image sensor and application processor bridge


Figure 3. Connecting a low resolution camera to SPI port of processor


Figure 4. Converting display interfaces


Figure 5 – Refreshing screens with processor idle to lower power

Challenge 3 – Migration to a new processor due to increased requirements
As the saying goes, the only thing that is constant is change. This is quite true in all electronic products, including those involved in IoT. Most of this change in electronic products is additive in nature – adding new features, new interfaces, more memory, bigger displays, improved wireless modules, and new sensors. Such a migration from generation to generation of a product family often demands migration to a larger, more powerful processor to accommodate extra IOs, higher bandwidth, and new interface standards.

There is, however, another option – A processor companion FPGA. A low cost FPGA can be used to augment and supplement many of the processor’s requirements, allowing the designer to keep the existing processor and minimize the impact to the firmware. This companion FPGA can expand the number of IOs, control a new type of memory, bridge to new serial interface standards, or add more sensors by expanding I²C and SPI serial ports. Here are some examples in Figures 6 & 7.

Figure 6 – Processor expansion for DDR3, LEDs, and display


Figure 7 – Expanding processor for SGMII in IoT Gateway application

As the IoT market grows, unique challenges arise for manufacturing these smart, connected devices. These primary design challenges include power efficiency, interoperability across different interfaces, and compatibility with new processors. However, solving the most common design problems can be addressed with a programmable logic device, which offers a low cost, small size, and very low power solution ideal for IoT applications.

Helmut Demel is a Staff Field Application Engineer at Lattice Semiconductor in Germany.

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