FuSa development tools for RISC-V support latest SiFive automotive solutions
Software vendor IAR Systems continues their support for SiFive’s RISC-V Automotive CPU IP: The IAR Embedded Workbench for RISC-V aims at the latest SiFive Automotive E6-A and S7-A product series which address the needs of automotive applications like infotainment, connectivity, and ADAS.
RISC-V uses a single instruction set architecture (ISA) across all product offerings increases code portability and can reduce cost and time-to-market also for automotive applications. The SiFive Automotive processor families offer flexibility, with options that enable both area and performance optimization for different integrity levels like ASIL B, ASIL D or mixed criticalities with split-lock, in line with ISO26262. The recently announced E6-A series is aimed at a variety of real-time, 32-bit applications, from system control to hardware security modules (HSMs) and safety islands, and of course standalone in microcontrollers. The new S7-A is a 64-bit, high-performance real-time core perfectly suited to the needs of modern SoC with performant safety islands, requiring both low latency interrupt support and the same 64-bit memory space visibility as the main application CPUs.
IAR Embedded Workbench for RISC-V is a development toolchain that includes the IAR C/C++ Compiler and a debugger. The functional safety edition of IAR Embedded Workbench for RISC-V is certified by TÜV SÜD according to the requirements of several functional safety standards, including ISO 26262 and IEC 61508. To ensure code quality for automotive applications, the integrated C-STAT tool for static code analysis proves code alignment with industry standards like MISRA C:2012, MISRA C++:2008 and MISRA C:2004.
Customers using IAR Embedded Workbench for RISC-V can benefit from IAR Systems’ support for the sold version for the duration of the support contract, validated service packs, and regular reports of known deviations and problems.
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