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Gate driver enables scalable EV-powertrain designs

Gate driver enables scalable EV-powertrain designs

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By Jean-Pierre Joosting



The STGAP4S galvanically isolated automotive gate driver for SiC MOSFETs and IGBTs from STMicroelectronics delivers the flexibility to control inverters of different power ratings. It features programmable protections and rich diagnostics that allow ISO 26262 ASIL D qualification.

With an integrated ADC and flyback controller, the STGAP4S gate driver is functionally safety-qualified for scalable EV powertrain designs.

The STGAP4S owes its flexibility to the output circuit that allows connecting the high-voltage power stage to an external MOSFET’s push-pull buffer to scale the gate-current capability. This architecture lets engineers leverage the gate driver and its wide features to control inverters with different power ratings, up to high-power designs with multiple power switches in parallel. The driver can generate up to tens of amperes of gate-drive current with very small MOSFETs and handles a maximum operating voltage of 1200 V.

Advanced diagnostics enhance system safety integrity to ISO 26262 level D (ASIL-D) for safety-critical applications. The diagnostics include self-checks to verify the integrity of connections, gate-drive voltages, and the correct operation of internal circuitry, such as desaturation and over-current detection. The host system can read the diagnostic status register via the SPI port. Additionally, two diagnostic pins provide hardware-detectable indications of fault status.

With protections such as active Miller clamping, under-voltage and over-voltage lockout (UVLO, OVLO), as well as desaturation, overcurrent, and over-temperature detection, the STGAP4S enables robust and durable designs that meet stringent reliability demands. The device features configurable parameters, including protection thresholds, deadtime, and deglitch filtering, programmed through the SPI, providing extensive design flexibility.

The STGAP4S gate driver also integrates a fully protected flyback controller. This can optionally generate the supplies of the high-voltage section for the positive and negative gate-driving signals for fast, efficient switching of SiC MOSFETs. The galvanic barrier provides 6.4 kV of isolation between the low-side circuitry and the high-side sections.

The EVALSTGAP4S evaluation board, now available, features two STGAP4S drivers that facilitate the evaluation of their attributes in a half-bridge application. This design allows users to easily connect additional boards to assess more complex topologies, such as a three-phase inverter.

www.st.com/stgap4s

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