Generate dual supply rails using a high-efficiency SEPIC-Cuk converter

Technology News | December 11, 2011

By eeNews Europe

Even with the widespread use of single-supply rail-to-rail op amps, dual rails (for example, ±15 V) must often be generated from a single (positive) input rail to power other parts of the analog signal chain. These are often low current (such as 10 mA to 500 mA), with relatively well-matched loads on the positive and negative supplies.

One solution to this problem is to use two different dc-to-dc converters; one to provide the positive rail and one to provide the negative rail. This can be expensive and, as this article shows, unnecessary. Another solution uses a flyback, but the supplies don’t track each other very well with differential loading, a large, expensive transformer is required, and efficiency tends to be low.

A better solution is a SEPIC-Ćuk converter, Figure 1, which consists of an unregulated Ćuk converter tied to the switching node of a regulated SEPIC converter. This combination results in two high-efficiency supplies that track each other very well under all but a 100% load mismatch. [Editor’s note: if you are unfamiliar with the Ćuk converter, see Ćuk-Middlebrook paper, Reference 1.]

Figure 1: SEPIC-Ćuk converter.

(Click here to enlarge.)

At its most-basic level, the SEPIC-Ćuk converter is simply a SEPIC converter connected to a Ćuk converter at their switch nodes. Figure 1 is drawn with L1 and L2 in parallel, rather than a single inductor, to make the coupling of the two converters more obvious. This coupling between converters is possible because their conversion ratios are equal and opposite and the voltage waveforms at SN1 are the same for both converters.

Interestingly, other than C_out, the currents in the components of each converter are identical (once you account for the negative signs, since the Ćuk creates a negative voltage), as shown in Figure 2 and Figure 3. Thus, with equal loading on each output, I_L1 = I_L2, I_L3 = I_L4, I_C1 = I_C2, and I_Q3 = I_Q2.

Therefore, identical values should be used for each component, as this will result in better matching between the two output voltages and simplify the small-signal analysis, Equation 1.

Figure 2: Idealized SEPIC waveforms.

(Click here to enlarge.)

Figure 3. Idealized Ćuk waveforms.

(Click here to enlarge.)

This topology can be built with three single-winding inductors, two coupled inductors, a custom 1:1:1 transformer, or a six-winding Hexapath device from Coilcraft (or equivalent). Coupling the inductors reduces current ripple in the inductors by a factor of two (again, Reference 1), significantly reduces the complexity of the small-signal model, and enables higher bandwidth by eliminating the SEPIC and Ćuk resonances.

One of the main advantages of this topology is that a single, standard current-mode boost controller (such as the ADP1621 or ADP1613) can implement both negative and positive outputs, with feedback taken from the SEPIC (positive) output. If the components are chosen according to the following rules, the small-signal model for this complicated converter will look nearly identical to a single-output current-mode SEPIC:

1. Use the same capacitance on each output.

2. The capacitance of C2 should be slightly larger than that of C1. These capacitors are generally ceramic, so the difference in dc bias must be taken into account.

3. Coupled inductors should be used, such that L1 is coupled with L4 and L2 is coupled with L3. Identical inductors should be chosen for the both the SEPIC and Ćuk outputs.

By nature, the Ćuk (negative) output of the SEPIC-Ćuk is unregulated; thus, some amount of load variation occurs with output current, particularly with load mismatch, as compared to the SEPIC (positive) output. Note that the tracking is much better than a similarly configured flyback converter, especially in the case of transient or load mismatch, because the coupling between channels is a direct connection rather than through the transformer with its inherent leakage inductance.

With an identical load on both supplies, at steady state, the most significant error terms are the mismatch in DC resistance of the inductors and the forward voltage of the diodes, both of which can be made quite small relative to the output voltage.

With substantial load mismatch, the error grows (Figure 4). Therefore, in some applications it may be necessary to put a small dummy load on one or both the channels to keep both supplies in their regulation window. Note that analog components such as op amps are generally insensitive to dc changes in their power supplies, as long as sufficient headroom is available.

Figure 4: Relative voltage regulation between rails

with differential loading.

(Click here to enlarge.)

Figure 5 shows a 30-mA transient applied to the Ćuk (−V_OUT) output of a SEPIC-Ćuk converter, while a constant 100-mA load remains on the SEPIC output. Note that both outputs respond to the transient load.

This is the worst-case transient because the Ćuk (negative) output is unregulated. Interestingly, most of the deviation shown on the −V_OUT rail is actually dc regulation shift caused by the mismatch between the loads applied to the two rails (I_OUT+, I_OUT−).

Figure 5: Transient response from a 30-mA load-step

applied to the negative (Ćuk) output.

(Click here to enlarge.)

A test board design, shown in Figure 6, was built using the Excel-based ADIsimPower™ design tool. This comprehensive design tool provides a fast, accurate way for a user to create a complete schematic and BOM for SEPIC-Ćuk and many other switching converter topologies.