Globalfoundries at work on next-gen FDSOI process
Globalfoundries claims its 22FDX platform, four processes with different optimizations, can deliver FinFET performance and energy efficiency at a cost comparable with planar 28nm CMOS. The ability to perform back-biasing provides the opportunity to dynamically change the operation of transistors from performance to minimal leakage.
However, FinFET production remains the mainstream option for leading edge ICs that is best supported by foundries, including Globalfoundries, and by IP developers. In addition Samsung’s foundry is also offering a 28nm FDSOI process.
Patton, previously a career-long IBM researcher, was brought in to Globalfoundries when the foundry acquired IBM’s semiconductor operations (see IBM-GlobalFoundries Deal Finalized).
“We looked at both FinFET and FDSOI is perfectly suited for the mobile space,” Patton told eeNews Europe on the sidelines of the IMEC Technology Forum held in Brussels this week. “The work started in Malta (New York) and has transferred to Dresden. The yields are ahead of schedule and the focus is on getting design IP built up.”
Globalfoundries is working with a company called Invecas Inc. to develop foundation IP for its 14nm FinFET and 22nm FDSOI manufacturing processes. The schedule for 22FDX has Globalfoundries starting risk production for customers late in 2016 with volume manufacturing arriving in 2017.
Patton made the point that FinFET processes with their high drive current capability are well suited to driving signal lines across large chips and where sustained performance is required. However, for smaller chips and chips where power consumption is key then FDSOI is a better option. Patton also makes the point that FinFETs have a quantized drive regime where a developer must choose between 1, 2 or more fins, which is not suited to analog or RF signal.
But although Globalfoundries has been extolling the virtues of 22FDX for analog and the RF in the Internet of Things (IoT) Patton makes the point that the process also addresses digital requirements. “There’s a ton of digital business in mobile sitting at 65nm, 40nm. And the cost of migrating that to FinFET is high compared with moving to another planar process, such as FDSOI,” he said.
However the FDSOI process – originally research by IBM and then championed by STMicroelectronics and now Globalfoundries and Samsung – has had a difficult gestation. It is four years since an initial deal between STMicroelectronics and Globalfoundries to produce FDSOI in volume at the Dresden wafer fab (see ST opens up 28-nm, 20-nm FDSOI with GlobalFoundries).
With the possibility of potential design wins for FDSOI going to 16nm and 10nm FinFET processes a lack of road-map could be seen as a disadvantage. Modern design involves the migration of larges amounts of proprietary and third-party IP cores and therefore continuity of process is significant.
“We have a next generation fully depleted process that is underway in Malta,” Patton said without confirming a nominal node name. The labelling of nodes with a minimum dimension is largely moot in the modern era. Upcoming 10nm and 7nm nodes from TSMC will have minimum feature sizes of about 20 and 14nm respectively and be produced on 32nm or 36nm pitch.
Related links and articles:
News articles:
IBM-GlobalFoundries Deal Finalized
ST opens up 28-nm, 20-nm FDSOI with GlobalFoundries
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