Gowin offers ARM-based FPGA-SoC
The LittleBee family of FPGAs is based on 55nm LP manufacturing process technology and offers instant-on, non-volatile, low power, intensive I/O and small footprint. The availability of GW1NS is the precursor of a roll out of a strategy by Gowin on artificial intelligence and edge computing, the company said.
The GW1NS-2 FPGA SoC device includes a Cortex-M3 processor core, a USB2.0 PHY interface, flash memory, SRAM read/write controller and an ADC converter as well as 1.7K look-up tables (LUTs) of Gowin FPGA fabric. Gowin provides an integrated development environment, where engineers can develop their hardware and software in a single platform.
Features of GW1NS-2 FPGA-SoC. Source: Gowin Semiconductor Corp.
The GW1NS-2 is expected to find design wins in industrial control, communication infrastructure, Internet-of-things, servo control, smart home, security encryption and consumer electronics.
The primary objective of the FPGA SoC design flow is to configure the FPGA fabric to be various physical peripherals of the embedded ARM processor. After completing the architecture and hardware design with the FPGA logic, engineers can do embedded processor software programming to configure these peripherals. Gowin provides a driver library, combining the compiler, linker and debugger in an integrated development environment to support GW1N2-S FPGA SoC programming; and also support ARM-MDK and GNU software design tools.
Engineering samples and a development board are available, Gowin said.
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