Green Hills Software adds RISC-V development tools support
The MULTI IDE, multicore debugger, optimizing C/C++ compilers and hardware JTAG probe is a complete solution for those developing applications for RISC-V pre-silicon and silicon designs. Early access customers have already had access to the Green Hills solution for RISC-V to gain competitive advantages with differentiation through the RISC-V’s custom instructions and modular instruction set architecture.
The Green Hills software development tools provide support for both 32-bit and 64-bit RISC-V architectures and provide for the Integer, Multiply/Divide, Atomic, Compressed, and Single- and Double-Precision Floating Point modules. It is easy for developers to add custom RISC-V instructions and use them in the Green Hills compiler, assembler, MULTI debugger, and instruction set simulator. RISC-V’s separate privileged instruction set specification has also been supported. Green Hills Compilers support ISO/IEC 14882:2011 (C++11), ISO/IEC 14882:2014 (C++14) and ISO/IEC 14882:2017 (C++17) to provide a number of new language features and standard libraries. Green Hills Compilers also support Embedded C++ and GNU C/C++ extensions.
The MULTI toolchain meets the highest levels of tools qualification and C/C++ runtime certification for the automotive, industrial and railway markets (ISO 26262, IEC 61508, EN 50128). Green Hills will provide certification support and evidence for MULTI and the C/C++ run-time libraries for RISC-V in 2021 to help customers’ meet FuSa production program requirements.
An MISRA C/C++ Adherence Checker for MISRA 2004 and MISRA 2012 is integrated into the MULTI development tools, and the DoubleCheck static source analyser can find and identify programming errors. DoubleCheck automatically runs during compilation. The Run-Time Error Checking tool complements DoubleCheck by finding bugs at run-time that cannot be identified by static analysis alone.
The MULTI debugger and JTAG Probe also bring single-window debugging and control on complex heterogenous SoCs comprised of one or more RISC-V cores with other cores such as Arm. The Profiler can pinpoint performance bottlenecks by clearly displaying processor times consumed by each task, function, source line, and assembly language instruction.
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