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GUC, proteanTecs team for 5nm die-to-die interconnect monitoring

Business news |
By Nick Flaherty


ASIC design house GUC is using die-to-die monitoring technology from proteanTecs in Israel in its latest chiplet-based designs.

The collaboration started with the reliability monitoring of high bandwidth memory (HBM) interfaces and has continued with GUC’s second generation high speed interface, GLink 2.0. This is a a 17Gbit/s die-to-die (D2D) parallel interface with low latency and high power efficiency of 0.3pJ/bit. 

proteanTecs’ interconnect monitoring solution was integrated into a 5nm GLink 2.0 test chip to provide GUC with visibility of the links in testing and characterizing the PHY and to enhance the end product with in-field performance and reliability monitoring.

Dies are assembled over the silicon interposer using very small micro-bumps which may suffer from latent defects such as voids or cracks, potentially posing a reliability risk to the assembled product. On organic substrates, rare resistive shorts, known as bridge-shorts, can cause signal integrity and performance degradation. These types of latent defects, although rare, could cause a system failure over time if not screened out during final test or detected during in-field operation.

Moreover, once the dies are assembled on the interposer or substrate, there is no practical way to test and assure that all thousands, sometimes over 10,000 lanes, are fully functional, defect-free and performing to spec.

proteanTecs provides a monitoring solution for heterogeneous packaging based on chip telemetry, combining deep data with machine learning algorithms.

This uses low footprint, digital-only monitoring IP, or agents, to monitor the performance of the parallel interface. These can be placed next to each pin inside the parallel die-to-die (D2D) PHY, to achieve 100% coverage and with no impact on the signal behaviour, quality or timing.
Measurement data coming from the monitoring system is then extracted and ready for data analytics using proteanTecs cloud-based platform, where machine learning and dedicated algorithms are implemented to process the data, provide actionable insights, issue alerts, and visualize though customizable dashboards.

Both proteanTecs and GUC are contributing members of the UCIe (Universal Chiplet Interconnect Express) Consortium, which is uniting industry leaders in building an interoperable, multi-vendor ecosystem and standardizing future generations of D2D interconnects and protocol connections. 

“proteanTecs is the only company today offering comprehensive visibility into high bandwidth D2D interfaces,” said Igor Elkanovich, CTO at GUC. “Their high-resolution interconnect monitoring solutions deliver parametric lane grading with 100-percent lane and pin coverage, empowering us with critical insights that both accelerate and enhance our device testing and characterization, and offer our customers in-mission lifetime monitoring.”

“GUC’s 2.5D/ 3D advanced packaging technologies are playing an important role in addressing the semiconductor industry’s ‘More than Moore’ evolution to chiplets and heterogeneous integration,” said Evelyn Landman, co-founder and CTO at proteanTecs. “We look forward to our continued collaboration on GUC’s family of D2D interface solutions as we support the expanding advanced packaging ecosystem.”

Data from the project is here (sign in required).

www.guc-asic.com

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