HC11 “legacy” core, with all peripherals, in IP form
The IP core offers the legacy architecture, cycle-compatible with original microcontrollers such as 68HC11E, 68HC11A, 68HC11D, 68HC11F1, MC68HC11K0 MC68HC(L)11K1, MC68HC(L)11K4, MC68HC11KS2, MC68HC711K4, MC68HC711KS2, MC68HC11KW1. The D68HC11 can be used as a direct replacement, pin-to-pin compatible with the original HC11 MCU.
Two options are available for the D68HC11: standard with preconfigured MCU, where configuration is identical to the original HC11, or optimised, offering an individual configuration with extra peripherals and additional custom blocks as required by the application. There are asynchronous serial communication interface (SCI) and separate synchronous serial peripheral interface (SPI) included. The main 16-bit, free-running timer system contains input capture and output-compare lines and a real-time interrupt function.
An 8-bit pulse accumulator subsystem can count external events or measure external periods. A memory expansion unit (with six address extension lines) allows up to sixteen 32 kB banks of external memory to be addressed in either of two bank windows.
The MEU extension of memory space can be up to 1MB. There is also self-monitoring on-chip circuitry included, which protects D68HC11E against system errors. The Computer Operating Properly (COP) watchdog system protects against software failures. An illegal opcode detection circuit provides non-maskable interrupt, if the illegal opcode is detected. Two software-controlled power-saving modes – WAIT and STOP are available, to conserve additional power. These modes make the D68HC11 IP Cores attractive for automotive and battery-driven applications.
The D68HC11 IP Core can be also equipped with the ADC Controller. This allows the use of an external ADC controller with standard ADC software. This extra design feature added in DCD’s design makes external ADC’s visible in the same way, as internal ADC’s in the original 68HC11E Microcontrollers. The D68HC11 has been equipped with a built-in, real-time, on-chip hardware debugger, allowing easy software debugging and validation. This on-chip debugger can halt, run, step into or skip an instruction, read/write any contents of microcontroller, including all registers and SFRs, including user defined peripherals, data and program memories.
Digital Core Design; www.dcd.pl/ipcores/59/
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