Ridgetop’s prognostic solution includes a real-time solder ball grid array (BGA) health monitoring IP block tailored for all Altera FPGAs, the company said.
BGA packages rely upon individual solder balls to attach the FPGA to a printed circuit board. SJ BIST provides a prognostic sensor for monitoring these solder ball joints, allowing programmers to integrate early warning systems for pending BGA pin failure into their high-reliability projects, according to Ridgetop.
Ridgetop’s IP uses a patented method that consists of an easily instantiated real-time monitoring technique for FPGAs used in harsh, high-vibration environments where early detection of problems is warranted, the company said. The SJ BIST product has been tested by major U.S. government prime contractors and NASA, according to the fir.
Through the agreement with Altera, Ridgetop will add its validated SJ BIST IP module to Altera’s third-party IP partnership program’s library blocks. Altera FPGA customers can license and download Ridgetop’s IP and use it to build real-time prognostic monitoring into their applications and processes, the firm said.
"The addition of Ridgetop’s SJ BIST to our programming library opens up new opportunities for Altera," said Sheri Andrew, senior manager IP marketing for Altera, in a statement. "With the addition of real-time health monitoring, our customers can watch for intermittencies caused by package and board interface stresses, which offers a more comprehensive solution to our customers."