High-Performance clock buffer family claims Industry’s lowest additive RMS phase jitter
The new buffers produce multiple identical clocks typically used by several interface ports and ICs such as processors and FPGAs in the system. They can produce up to 10 differential outputs in formats including LVPECL, LVDS, and CML. The new buffers are offered in a variety of packages including 8-pin SOIC, 8-pin TSSOP, 20-pin TSSOP, and 32-pin TQFP.
The family of low-jitter, low-skew high-performance buffers complements Cypress’s FleXO family of low-jitter clock generators. Together with FleXO, the High-Performance Buffer Family can help fulfill the timing tree requirements in a variety of systems, including networking routers, switches, and wireless base stations.
The High-Performance Buffers are available now from Cypress and its authorized distributors.
More information about the CY2Dx15xx family of buffers at www.cypress.com/go/HighPerformanceBuffers