IAR and CAES partner on space grade RISC-V processor

IAR and CAES partner on space grade RISC-V processor

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By Jean-Pierre Joosting

IAR Systems® and Gaisler, the fault-tolerant processor design center of CAES, have announced the start of a new partnership. IAR Systems will soon release a new version of the IAR Embedded Workbench for RISC-V, which will provide support for NOEL-V, the RISC-V space grade processor from Gaisler.

The NOEL-V is a synthesizable VHDL model of a processor implementing the RISC-V architecture. It is highly configurable, and it offers profiles going from high-performance Linux-capable architectures to area-optimized micro-controller systems. The NOEL-V is also designed to include fault tolerant features that allow it to run software without interruptions, correcting automatically faults due to the radiation naturally present in the space environment.

The IAR Embedded Workbench for RISC-V is a complete development toolchain that provides developers with everything they need in one easy-to-use integrated development environment. The toolchain offers extensive debugging capabilities, including multi-core debugging and analysis possibilities such as complex code and data breakpoints, runtime stack analysis, call stack visualization and code coverage analysis.

The IAR I-jet debug probe provides an efficient debug interface with NOEL-V systems, making use of the standard RISC-V JTAG debug interface, which will be also available in the next release of the freely downloadable NOEL-V FPGA example bitstreams, in December 2023.

Developers working on mission-critical applications based on the NOEL-V processor will also benefit from the IAR Compiler’s leading compiler optimization technology to reach higher performance and as well take advantage of IAR’s comprehensive debugger.

In general, this partnership will provide NOEL-V users with the flexibility of using another complete development toolchain, extending the broad toolset already provided by Gaisler.

“IAR has done a great job integrating NOEL-V support into the IAR Embedded Workbench, providing RISC-V space applications with their certified toolchain”, said Daniel Hellström, Head of the Software Section at Gaisler. “Using the RISC-V standard in our processors allows us to leverage the RISC-V software ecosystem and 3rd party toolchain and debug capabilities”.

For IAR Systems, this partnership is an important step into the space market, in which the NOEL-V architecture occupies a leading position.

“We are pleased to add support for NOEL-V RISC-V based processor to our RISC-V toolchain”, said Anders Holmberg CTO at IAR Systems. “Further IAR Embedded Workbench is the natural choice for companies worldwide working with safety-critical applications. The embedded expertise we have acquired in the last 40 years combined with CAES long heritage of providing space-grade processors will help hardware and software professionals accelerate development in the space industry.”


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