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IEDM: 14nm embedded MRAM has record energy efficiency

Technology News |
By Peter Clarke


Researchers from Samsung claim to have developed the smallest and most energy efficient non-volatile random access memory ever reported.

The team took the company’s 28nm embedded MRAM and scaled the magnetic tunnel junction to the 14nm FinFET logic process. The researchers will report on this at the International Electron Devices Meeting coming up in December in paper #10.7, World’s most energy-efficient MRAM technology for non-volatile RAM applications.

The paper precis relates that the team produced a stand-alone memory with a write energy requirement of 25pJ per bit and active power requirements of 14mW for reading and 27mW for writing at a 54Mbyte per second data rate. The cycling  is 10^14 cycles and when scaled to a 16Mbit device, a chip would occupy 30 square millimeters.

To achieve this performance the research team scaled the magnetic tunnel junction down to Samsung’s 14nm FinFET logic platform resulting in a 33 percent improvement in area and 2.6x faster read times compared to the 28nm predecessor.

One of the goals of the research was to demonstrate the suitability of embedded MRAM as a cache memory for applications that rely on large datasets and analysis, such as edge AI.

The theme of the 68th IEDM is “The 75th anniversary of the transistor and the next transformative devices to address global challenges.” The conference will be held in-person December 3-7, 2022 at the Hilton San Francisco Union Square hotel.

Related links and articles:

www.ieee-iedm.org

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