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IEDM: Magnetic RAM debuts as 28nm embedded NVM

IEDM: Magnetic RAM debuts as 28nm embedded NVM

Technology News |
By Peter Clarke



A team drawn from Samsung R&D and Samsung’s LSI business unit are apparently going to present the same information twice once in the main program and once in poster session dedicated to MEMS development.

The topic of both the oral presentation and the poster presentation is an 8Mbit spin-torque transfer MRAM embedded in a 28nm CMOS logic manufacturing process. The title of the main presentation – paper 27.2 – describes the circuit as “highly functional and reliable.” The abstract adds that a novel integration, material stack and patterning technologies have been used to embed the perpendicular magnetic tunnel junction memory cell array into the copper metal back end without open fails and without severe degradation of the magnetic properties.

The perpendicular MTJ (pMTJ) uses a MgO/CoFeB stack to achieve a tunnel magnetoresistance value of 180 percent after full integration. Ion beam etching was used to reduce short fails below 1ppm. It will be interesting to see what the implications of IBE are for production throughput. The embed MRAM macro has a side sensing margin and retains information at 85 degrees C for 10 years, the abstract states.

Depending the economics of manufacturing this could be a process of choice for low-power microcontrollers and SoCs due to their ability to be switched off and retain data.

And on the stand-alone memory front a team of researchers from SK Hynix Inc. and Toshiba Electronics Korea Corp. is set to describe the first 4Gbit spin-torque transfer MRAM. The development is based on memory cells with an area of 9F2, very close to the size of DRAM cell, according to the abstract. The design has pMTJ optimized for a high tunnelling resistance ratio and therefore a low switching current requirement. Various techniques are set to be described that were used to manage write errors arising from process-related defects.

Everspin Technologies Inc. (Chandler, Ariz.) displayed a 1Gbit pMTJ-based MRAM at Electronica this year.

It is also notable that Professor Pedram Khalili-Amiri – of both the department of electrical engineering at University of California Los Angeles and of startup company Inston Inc. (Los Angeles, Calif.) – is a co-author on four papers selected for the special poster session on MRAM. The subject in various forms is electric field controlled MRAMs and voltage control of MRAMs.

Inston Inc. has been the recipient of two small business innovation research (SBIR) grants. In 2013 the company received $149,000 to investigate electric-field-controlled magnetic memory devices, where switching of the nonvolatile memory bits is performed by voltages rather than spin-polarized currents or magnetic fields, for extremely low energy dissipation applications.

These memory devices will be used in a Magnetoelectric Random Access Memory (MeRAM) and are claimed to provide significant advantages over STT-MRAM; up to 100x energy efficiency, up to 10x density and scalability to below 10nm.

A second grant in 2014 worth $749,000 was intended to develop prototypes of electric-field-controlled nonvolatile magnetic memory chips and arrays.

Related links and articles:

www.ieee-iedm.org

www.inston-inc.com

News articles:

Sony revealed as MRAM foundry for Avalanche

MRAM pioneer moves to 20nm, preps sampling program

Globalfoundries offers embedded MRAM on 22nm FDSOI

MRAM is leading embedded NVM race, says IMEC researcher

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