IEDM: TSMC to report 2D nanosheet transistor
TSMC engineers, working with two universities in Taiwan, will report on the world’s first nanosheet gate-all-around transistor made with a two-dimensional semiconductor material at this year’s International Electron Devices Meeting (IEDM).
Silicon nanosheet transistors or aka nanoribbon offer improved electrostatic control and relatively high drive current and are being implemented in 3nm manufacturing processes.
According to highlights picked from the forthcoming IEDM program TSMC has shown the possibility of using a transition-metal dichalcogenide monolayer for the semiconducting channel in a nanosheet transistor. In this case it is molybdenum disulphide.
Such two-dimensional materials can have enhanced electron mobility compared with silicon and spin-orbit coupling that gives rise to possibilities of spintronic computation.
More work required
The transistor with a 40nm gate width produced a drive current of 410microamps per micron at Vds of 1V. It would be expected to increase the drive current by stacking devices.
The TSMC-led team will report on an integration flow for making such transistors but work remains to be done on optimizing performance.
The TSMC paper #34.5 First demonstration of a GAA monolayer MoS2 nanosheet nFET…is one of the highlights of the 68th annual IEDM.
In paper #7.4, Nearly ideal subthreshold swing in monolayer MoS2 top-gate nFETs with scaled EOT of 1 nm, a TSMC-led team describes the integration of hafnium-based dielectrics with MoS2, to build a top-gated nFET creates a stackable system. The subthreshold voltage swing is less than70mV/dec. and this indicates low leakage current when transistors are turned off.
The theme of the 68th IEDM is “The 75th anniversary of the transistor and the next transformative devices to address global challenges.” The conference will be held in-person December 3-7, 2022 at the Hilton San Francisco Union Square hotel.
Related links and articles:
News articles:
IEDM to discuss 2D materials, 3D architectures
Samsung to introduce nanosheet transistors in 3nm node
TSMC shows 2nm nanosheet transistor plans for 2025 production
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
