Image processor makes camera-based ADAS cheaper

Image processor makes camera-based ADAS cheaper

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By eeNews Europe

Featuring 13 hardware-based image recognition accelerators, the TMPV7602XBG incorporates ADAS functionalities that will become part of the Euro NCAP testing program in 2018. These include AEB (Autonomous Emergency Braking), TSR (Traffic Signal Recognition), LDW (Lane Departure Warning) / LKA (Lane Keeping Assist), HBA (High Beam Assistance) and FCW (Forward Collision Warning). Toshiba’s device also supports a number of new applications such as TLR (Traffic Light Recognition) and night-time pedestrian detection.

ADAS applications are processed concurrently within a typical time window of 50ms inside the image recognition processor and with relatively low power consumption due to the purpose-built hardware accelerators and media processing engines (MPEs). The TMPV7602XBG can process up to five applications concurrently while consuming less power than other devices targeting mid- to high-end ADAS designs. By using a single video input channel a cost optimized camera system with a small form factor can be realized.

The TMPV7602XBG integrates new, enhanced CoHOG accelerators that provide far higher image recognition accuracy than previous devices, especially in low light and night-time conditions. Colour-based gradient analysis of images supplied by a full HD (2 megapixel) connected camera also improves night-time pedestrian detection rates.

The processor can handle multiple applications simultaneously in real time using its Heterogeneous Multi-Core architecture. The device features newly-integrated image processing accelerators and four MPEs (Media Processing Engines) supported by FPUs (Floating Point Units) that perform double precision floating point arithmetic calculations.

The chip is housed in a BGA 521 ball package measuring 17mm x 17mm with a ball pitch of 0.65mm. Sample shipments of the TMPV7602XBG will start in March 2016.

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