Imec/Renesas pioneer high-performance RF solutions in 28nm cmos technology

Imec/Renesas pioneer high-performance RF solutions in 28nm cmos technology

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By eeNews Europe

The 28nm receiver is a linear software-defined radio (SDR) operating from 400 MHz up to 6 GHz and supporting reconfigurable RF channel bandwidths up to 100 MHz. Through novel design and architecture techniques, the receiver operates at a low standard supply of 0.9V, while maintaining +5 dBm of out-of-band IIP3 and tolerating 0 dBm blockers. It achieves noise figures down to 1.8 dB, occupies an active area of 0.6 mm2, and consumes less than 40 mW.

The ADC is a 410 Msample/sec dynamic 11-bit pipelined SAR ADC in 28 nm CMOS. It achieves a peak Signal-to-Noise Distortion Ratio (SNDR) of 59.8 dB at 410 Msample/sec with a power consumption of 2 mW. By combining novel digital calibration techniques with a new ADC architecture, an excellent energy efficiency was achieved. The ADC, including an on-chip calibration engine, occupies an active area of 0.11 mm2.

Imec specialises in developing reconfigurable RF solutions, high-speed/low-power ADCs and new approaches to digitise future RF architectures and minimise antenna interface requirements. The company combines innovative design with advanced chip technology (28nm and beyond) to develop small, low-cost, energy-efficient RF solutions with competitive performance. Imec aims at developing solutions that cover all key broadband communication standards including emerging cellular and connectivity standards such as LTE advanced and next-generation WiFi.

“High-volume consumer devices require advanced chip technology that is cost-effective,” stated Joris Van Driessche, program manager of reconfigurable radios at imec. “Along with our partner, Renesas, we are thrilled to continue to offer innovative solutions to the market. Our 28nm wireless receiver brings the electronics industry closer to the development and adoption of next-generation wireless devices.”

“High level integration and low power are strongly required for recent wireless transceivers. There is every possibility of creating epoch-making architecture for RF and analogue cores by using fine CMOS technology,” said Hisayasu Sato, Senior Manager of 2nd Analog Core Development Department, Core Technology Business Division, 1st Solution Business Unit, Renesas Electronics Corporation. “Through the collaboration with imec, we have been developing cutting-edge technologies. We continue to supply competitive IP cores and solutions to our customers.”


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