IMEC reports low-power IP blocks for 5G

IMEC reports low-power IP blocks for 5G

Technology News |
By Peter Clarke

The first is a successive approximation analog-to-digital converter (SAR ADC), designed for consumer electronics, such as mobile phones, operating in the below-6GHz frequency bands. Secondly, IMEC has developed a 60GHz front-end with radio frequency (RF) phase shifting and on-chip transmit-receive switching, targeting 5G fixed wireless access and small cell backhaul applications.

The SAR manufactured in 16nm CMOS targets smartphone applications in the below-6GHz band and is capable of 300 megasamples per second. The core area measures 350-micron by 325-micron and achieves a dynamic power consumption of 3.6mW at 300Ms/s and low-frequency signal to noise and distortion ratio (SNDR) of 70.2dB at 204MS/s.

The 60GHz radio front-end features 8-way calibration-free beamforming at RF frequencies to support a large number of antennas, making the technology attractive for fixed wireless access and small cell backhaul. The on-chip transmit-receive switching allows to share the antenna array between transmit and receive mode. The 9.6 square millimeter chip is implemented in 28nm CMOS and consumes 231mW in receive and 508mW in transmit mode (0.9V supply).

These building blocks are available to interested companies by joining IMEC’s industrial affiliation program, or through IP licensing.

The IMEC portfolio of circuits for 5G includes analog-to-digital convertors (ADCs), reconfigurable low-noise frequency synthesizers, millimeter-wave phased array transceivers, antenna modules and more. Most of them are designed to exploit scaled silicon CMOS and therefore can also be low cost.


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