Imec takes on key tool for 3D chips
SPTS’s Sigma fxP physical vapour deposition (PVD) system is the new process tool of record for low temperature PVD for development of new fan-out technologies such as flexible micro-bumps for chip scale packaging. This allows complex system-on-chip devices with BGA bumps to be combined with other devices with under bump metallization (UBM) and redistribution layer (RDL) processes.
“To meet the technical requirements of future micro- and nano-electronics, novel 3D integrated circuit (IC) architectures need to be developed to meet scaling challenges without compromising cost, performance, and power budgets,” said Kevin Crofton, President of SPTS Technologies and Corporate Vice President at SPTS owner Orbotech.
”Imec works closely with leading semiconductor companies to develop innovative wafer-level packaging architectures that will meet the performance requirements of next generation devices. Our low temperature PVD capabilities will support the development of a range of new interconnect technologies at imec, including flexi bumps, to address the scaling and packaging needs of future generations of nano-electronics,” he said.
Previous SPTS tools have been used at imec to develop industrially viable 3D-IC technology. “Equipment suppliers are key in developing an integrated solution for the challenges of scaling technology into advanced nodes,” said An Steegen, senior vice president of process technology at imec. “The collaboration with SPTS confirms imec’s direction to accelerate innovation for all our partners by closely interacting with suppliers at an early stage of development.”
“Imec plays a critical role in the long term development of the entire semiconductor value chain, from front to back-end,” said Crofton. “Their pre-competitive work supports the roadmaps of their core customers. Their remit dictates that they work with vendors and processes that are enabling for imec and their partners, and to be selected is a huge endorsement of our capabilities.”
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