Implementing an IoT end-point SoC platform with minimal engineering resources
These devices will be connected via low-power wireless networks, which will also require intelligence for management and functionality, via internet gateways and up into the cloud, where a mass of collected data can be accessed by mobile devices or analysed for IoT use cases.
For these IoT applications to be successful, crucial characteristics of end-point devices are very low cost – cents rather than dollars – and minimal energy consumption: devices will be powered by coin-cell batteries or scavenge energy from their environment and will need to last months or years rather than hours, days or weeks. A further typical characteristic of end-point devices is that they will usually be in sleep mode with infrequent communication.
Further application requirements include security, which is absolutely crucial in the IoT, and it must start within the end-point device and from there through the network and into the cloud. Furthermore, application software deployment on devices needs to be easy to access and control for maintenance and updating system or device parameters. Systems will need to be highly scalable and operate efficiently whether there are just a few or thousands of devices in the network.
Challenge – three engineers in three months
As in any electronics market – given sufficient demand for volume production – the advantages delivered with the integration of functionality on system-on-chip ICs (SoCs) include BOM-cost savings, robustness, size and power efficiency. Unlike leading-edge mobile consumer devices such as smartphones, however, IoT products and especially end-point devices such as sensor-based environment-monitoring systems will require a completely different performance/power profile, with low energy consumption typically being the overriding consideration.
In a proof-of-concept project, ARM set itself a challenge in 2015 to demonstrate that the physical implementation of an SoC for an IoT end-point device with strict low-power and cost constraints is easily attainable for small design groups from companies of almost any size, including start-ups as well as large OEMs/ODMs. Furthermore, the goal was to develop a platform and prototype a test chip that would enable their design teams to rapidly build differentiated solutions by integrating varying combinations of ARM IP with their own IP.
The project should also demonstrate the potential of ARM’s platform for IoT to minimize risk, while also reducing cost and accelerating time-to-market with only minimal engineering resources. One further goal was for ARM to gain a better understanding of the challenges of design and IP implementation for IoT devices – for example, it was an integration-first in a design for the company’s new Bluetooth radio IP together with embedded Flash.
The specific task was to rapidly implement this prototype silicon demonstrator platform – called Beetle – with only three engineers and in less than three months. Finalised and taped out in Q3 2015, the resulting platform integrates ARM IP on a single piece of silicon and includes an IoT subsystem with Cortex-M microprocessor, Bluetooth ‘Smart’ Low-Energy (BLE) radio, plus embedded Flash memory – see figure 1.
Fig. 1: The Beetle test chip die (right) and its different blocks (left).
The Beetle being a test chip, minimal optimisations were performed for area or power management. But even without significant effort, initial benchmarking and analysis were in line with similar ARM Cortex-M3 based devices. The ARM Cordio radio operates in the sub 1 Volt region as per design, and therefore allows extremely low power communication.
This test chip was built using the ARM Artisan physical IP platform specifically tailored for IoT applications. The design is also fully compliant with ARM’s mbed IoT platform to enable rapid development and prototyping.
Platform building blocks
Shown in figure 2 is the ARM IoT device demonstrator platform, which is implemented in TSMC’s 55nm process technology and runs mbed OS software. A central element of the platform is the IoT Subsystem, which was launched in mid-2015 and is designed to work with the Cortex-M3 processor or the Cortex-M4 for more demanding applications that require DSP instructions.
A second key piece is the ARM Cordio BLE radio, which incorporates the Bluetooth Core Specification Version 4.2 and is a best-in-class prequalified ‘hard macro’ block for rapid integration by designers familiar with digital design environments and design flows. Designed for optimum efficiency with Cortex-M processors, it features a sub-1V low-power core and it BLE radio offers leading-edge power consumption of less than 6.5mW (@1V) in active (Tx/Rx) mode and 700nW in sleep mode. Complementing these elements are the ARM Artisan standard cell, SRAM and general-purpose I/O physical IP libraries.
Fig. 2: ARM IoT Device Demonstrator Platform – The “Beetle” test chip
Device, communication and lifecycle security is primarily delivered via the ARM mbed IoT Device Platform, which includes the open-source mbed OS and the mbed Device Connector Service, which handles communication with IoT end-point devices. mbed is supported by more than 50 mbed ecosystem partners offering a host of compatible components, cloud services and software tools, and has been adopted by more than 150,000 developers worldwide.
The main device security aspect is primarily handled via mbed OS µVisor, which creates isolated security domains on the Cortex-M processor using its Memory Protection Unit (MPU), and communication security is handled via mbed TLS (Transport Layer Security). In many IoT applications device security must be augmented with additional features in hardware: for example, the Beetle demonstrator SoC implements ARM’s TRNG (True Random Number Generator) in hardware.
Implemented using a standard digital design flow and tools, the platform can enable digital design teams that have little know-how in the integration of radio or embedded flash to meet highly aggressive development timescales with minimal engineering resources. Layout guidelines are available to developers: essentially delivering integration capabilities for engineers with primarily digital experience.
Including timing and physical abstract models, the use of an EDA-tool-agnostic physical design kit (PDK) significantly mitigates the challenge of radio integration – engineers do not require extensive mixed-signal/RF expertise and in fact, the BLE radio can essentially be treated as a digital IP block.
Integration takes a relatively straightforward hard-macro-like approach with an all-digital interface to the host controller and standard AMBA-AHB bus interface for easy integration to the Cortex-M IoT subsystem. The asynchronous design also removes the dependency on clock timing between the radio and host control.
Other features of the implementation include use of sideband signals for radio power and clock control; a built-in pad ring for the radio I/O, to simplify integration and to help the critical and noise-susceptible radio I/O.
The integrator needs only to follow some basic integration guidelines to ensure sufficient noise isolation such as sufficient decoupling of the power supplies and guard-banding to avoid substrate noise.
To simplify this further macro blocks of decoupling metal-oxide-metal (MOM) capacitors were created to provide an area efficient bulk decoupling capacitor for the supplies as well as comprehensive guidelines for guard-banding against substrate noise between the radio and digital logic. To simplify design, the radio design requires minimal external components with just seven capacitors, two inductors, two crystals and an antenna.
The design also integrates embedded flash IP (from TSMC), which was a first experience of embedded flash for the design team and presented a more complex challenge than integrating SRAM blocks for example. It brings the requirement to use voltage-level shifting between the sub-1V logic domain and flash memory, which requires 1.2V/2.5V supply levels for its read/write operations. The ARM Artisan physical IP platform provides both regular and thick-oxide versions of the level shifters, required for shifting to the 2.5V domain.
Even when optimised for low-power systems, the embedded flash memory accesses contribute significantly to the power consumption of the SoC, prompting the development and use of an embedded flash cache to reduce flash memory accesses to a minimum. Two banks of 128K were implemented in the Beetle test chip, which as an example could run application code in one bank with over-the-air code updates in the second. The cache and flash controller are part of the IoT subsystem, which could support up to 512K of flash for more complex nodes.
Platform availability and evolution
The IoT subsystem for Cortex-M together with the Cortex-M3 processor, the Cordio radio, low-power Artisan physical IP libraries, embedded Flash hard macro (through TSMC), mbed Device Platform, plus an MPS2 development board are available now for rapid software and hardware prototyping and development.
The company is also looking to enrich its IoT development ecosystem to further enhance deployment and rapid prototyping of IoT devices. In conjunction with Thundersoft, ARM recently set up an IoT ecosystem accelerator in Beijing to offer workshops, training and design services to help IoT device makers from start-ups to OEMs.
In addition to the IoT components that have been used in the Beetle chip, ARM is proposing further security enhancements with the TrustZone CryptoCell IP. Artisan libraries for more advanced process nodes might also be used in the future to improve energy efficiency.
About the author:
Tim Whitfield is Director of Engineering at ARM’s Hsinchu Design Centre – www.arm.com