Improve the tracking performance of the PWM voltage-controlled buck converters by using a passive pre-filter
Abstract
The voltage-controlled pulse-width modulation (PWM) scheme provides high performance, low noise, and robust operation and hence, it is a very common control method for buck converters. In this method, usually an Error Amplifier (E/A) with a Type III compensation network (i.e., PID type) is used as the controller. For applications which require tracking of the output voltage with a reference signal, the non-inverting input of the Error Amplifier (E/A) will be directly connected to the reference signal.
The method is very simple and provides very small steady-state error between the reference input and the output of the converter. However, the error can be 50% or more during fast reference transition. The peak value of this error depends on the slew rate of the reference input and compensation values. The compensation values are usually fixed and selected to achieve a stable operation and fast load transient response. Moreover, limiting the slew rate of the reference might not be possible for some applications.
To enhance the tracking performance of the PWM voltage controlled buck converter, a simple resistor-capacitor network is proposed in this article. Indeed, this network is identical to the compensation values and cancels out their effect on the tracking response of the output voltage, while having no effect on the control loop gain, stability, line- and load-regulation. The experimental result in this article confirms that using this method, the maximum tracking error of the output voltage can drop from 66% to less than 15% for a 300µs rise time of reference voltage.
Introduction
Stability, low susceptibility to noise, and fast load-transient response are usually the primary objectives in the control of synchronous buck converters. However, in many applications the output voltage of the converter should also track an eternal reference either during start-up or normal operation. The reference is often taken from another power supply, which is also providing the power to the load.
For example, the Vtt rail should follow half of the VDDQ rail in DDR memory applications [Reference 1]. For proper operation of the load in such applications, the error between the output voltage and the reference input should not exceed certain level. However, meeting this criterion can be a challenge with a fast changing reference.
The voltage-controlled PWM method is widely used for synchronous buck converters due to its robust performance, flexibility, and low output ripple by running at constant switching frequency. Figure 1 shows a common block diagram of the synchronous buck converter with voltage mode control. In this scheme, the compensation is usually implemented with an Error Amplifier (E/A) using a resistor-capacitor network. The non-inverting input of the E/A (Vp) is connected to the external reference for tracking.
In the following section, the transfer function from the input reference to the output voltage is calculated using the average method. Then, a pre-filter circuit is proposed based on the calculated transfer function to enhance the tracking performance of the converter. Finally, simulation and experimental result are provided to confirm the effectiveness of the proposed circuit.
Figure 1: Block diagram of a voltage-mode-controlled
synchronous buck converter with tracking input
Model
Using the average-modeling technique the control block diagram of the converter can be simplified as Figure 2 [Reference 2]. In this diagram, G(s) is the transfer function of the power stage filter and is given by:
where Co, ESL, ESR are equivalent apparent capacitance, series inductance, and resistance of the output capacitors, respectively. L is the output inductance and RL indicated the equivalent series resistance of the power stage and can be approximated by
where DCR, Rdson_Ctrl, Rdson_Sync, and D are DC resistance of the inductor, Rds(on) of the control-FET, Rds(on) of the synchronous-FET, and duty cycle, respectively. Zout is the open loop output impedance of the output filter
Figure 2: Average model of the
synchronous buck converter with tracking input.
The output of the E/A (Ve) can be expressed as
where Zf, Zc, AV, Rf2 are the impedance between the output and the inverting input of the E/A, the impedance between Fb and Comp, the open loop voltage gain of the E/A, and the resistor from the inverting input to ground. Usually Rf2 is non-stuff for tracker applications and Av>>1. Thus, Equation (4) can be simplified as
where H(s) is defined as
Using Equations (1) to (6) and Figure 2, one can calculate the output with respect to the load current (io) and reference input (Vp) as
where L(s) is the loop gain and defined by
For majority of applications, the input voltage variation is less than ±10% of its nominal value. Thus, the effect of Vin on the loop gain has been neglected in the analysis in this article.
Using Equation (7) the control block diagram of the converter is simplified as Figure 3.
Figure 3: Control of a synchronous buck converter
using a compensation network and a pre-filter.
Compensation values are primarily selected to make the loop gain with a bandwidth of 1/5th to 1/10th of the switching frequency and a phase margin of over 45 degree to provide robust stability and fast response to step load transient (Figure 4). On the other hand, 1/H(s) should be less than -20db for a good fidelity of the output voltage to the tracking input. This latter condition is not valid for most of applications.
The compensation network has an integrator to reduce the steady state error to the reference input. Thus, 1/H(s) acts as a differentiator before the first zero of the compensator (Fz1). This behavior can explain the overshoot on the output during fast reference variation. However, at frequencies much lower than Fz1, where |1/H(s)|<<0 and |L(s))>>0, the output voltage tracks the reference input perfectly. Above Fp3, the gain of 1/H(s) increases linearly with the frequency.
Thus, any high-frequency noise at the tracking input can create jitter on the inductor node (also called the switch node) signal and extra output voltage ripple. To avoid these effects, we propose using a pre-filter at the reference input of the E/A. The pre-filter with this configuration doesn’t affect the stability of control loop. Thus, the problem of tracking and loop stability can be solved independently.
Figure 4: The gain of H(s) and 1/H(s)
for a Type-III compensator.
Pre-filter Design
One choice of pre-filter to achieve a good tracking performance is the inverse of (1+1/H(s)). That is,
This filter can be realized as shown in Figure 5, which has the same values as the compensation network.
Figure 5: The proposed pre-filter to enhance the
tracking performance of buck converter.
At frequencies lower than the loop bandwidth, where |L(s)|>>1, using this network the output of the controller can track the input with minimal error. Above the control loop bandwidth, the loop gain (|L(s|) drops and so the output voltage response to the tracking input. Thus, the network of Figure 5 can be simplified since its high frequency poles and zeros don’t have any significant effect on the tracking performance of the converter.
One possible solution is removing Cc2, and replacing Rf3 with short circuit. One can further simplify the circuit by replacing Zf with a single resistor and Zc with a single capacitor and placing the corner frequency of this filter at FZ1.
Simulation and Experimental Results
The Vtt termination rail for DDR3 memory is used for the application of the proposed pre-filter. The design uses the IR3831W SupIRBuck with 400kHz switching frequency, 12V input, and 0-8A load current sink and source capability. The schematic of the design is shown in Figure 6. The control loop is designed for a BW of 60kHz and phase margin of about 60 degrees.
Figure 6: The schematic of IR3831W
for Vtt tracking application
(click here to enlarge image).
.
Figure 7: Simulation result comparing the output voltage
to tracking input gain with and without the pre-filter.
Figure 7 depicts the gain of the output voltage to the tracking input with and without the pre-filter from the simulation results. As it can be compared in this picture, the pre-filter has dropped the gain to about 0 db, that is, unity gain.
Figure 8 (a and b) shows the experimental results of IR3831W controller without using the pre-filter when a sawtooth waveform is applied to Vp with frequencies of 300Hz and 3kHz. The rise time is 2.8ms and 280μs for 300kHz and 3kHz signals, respectively. The input voltage for this test is 12V, the biasing voltage is 5V, and the output current is 4A. All the waveforms are taken at room temperature.
Figure 8: Experimental results on the output-voltage
tracking of IR3831W without using the pre-filter.
a) Tracking to a 300kHz reference;(enlarge here)
b) Tracking to a 3kHz reference;(enlarge here)
(Ch3: Vout, Ch4: Reference, Math1:Vout-Reference Input)
Figure 9 (a and b) show the test results taken using the pre-filter at the same condition as Figure 8. The test shows the maximum tracking error for 2.8ms rise time is almost zero, if the prefilter is used. It also confirms that the prefilter can effectively reduce the tracking error from about 500mV to about 100mV with a 280μs rise time of the reference from 0V t0 750mV.
Figure 9: Experimental results on the output-voltage
tracking of IR3831W using the pre-filter.
a) Tracking to a 300kHz reference;(enlarge here)
b) Tracking to a 3kHz reference; (enlarge here)
(Ch3: Vout, Ch4: Reference, Math1:Vout-Reference Input)
Conclusions
Tracking performance of the voltage mode controller PWM converter is analyzed in this article. The output voltage to the input reference transfer function was calculated and it was shown that the compensator network adds extra gain to this transfer function below the control loop bandwidth. The distortion in the gain causes overshoots in the output voltage in response to fast changing reference voltage.
A simple passive pre-filter was proposed to enhance the tracking performance of the voltage mode controlled synchronous buck converter. The proposed circuit doesn’t interfere with the stability and load transient response of the converter. The performance of this circuit was successfully tested with simulation and experimental results. Experimental results confirm the effectiveness of the proposed method to enhance the tracking capability of the synchronous buck converters.
References
- International Rectifier Co.: Datasheet of IR3831W SupIRBuck
- A Rahimi, P. Parto, P. Asadi, “Compensator Design Procedure for Buck Converter with Voltage-Mode Error-Amplifier”, AN-1162, International Rectifier Co.
About the authors
Peyman Asadi received the B.S. degree from the Iran University of Science and Technology, Tehran, in 1996 and the M.S. degree from the University of Tehran, Tehran, Iran, in 1999, both in electrical engineering. He graduated from Texas A&M University, College Station, TX with the Ph.D. degree in electrical engineering in 2006.
He is currently a Senior System/Application Engineer at International Rectifier, Irvine, CA, where he is responsible for defining and developing of new low voltage ICs and multi-chips for Point of Load (POL) applications.
Parviz Parto is Senior Systems/Applications manager at International Rectifier Corp. He has more than 15 years of design experience in power electronics. He received his M.S. from Chalmers University of Technology, Gothenburg, Sweden in electrical engineering. He is author or coauthor of many technical papers and holds U.S patents in area of Power Managements.
His interests include Switching Mode Power Supply, Power Management and IC Semiconductor for Power Management. He is responsible for defining and developing power management products for point-of-load (POL) applications.
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