Indian startup offers I/O pad IP library for UMC 28nm process
The Alcor IO pad library platform supports a variety of interface standards including DDR, LVDS, and memory card super combo IO libraries. All the IO libraries have been tested in silicon for their compliance to standards for electrostatic discharge and latch- up performance.
Krivi (Bangalore, India) claims that the memory I/O pads that support all popular DDR standards up to DDR4 are industry’s smallest and support data transmission rates of up to 2.667Gbps in the HPL version of UMC’s 28nm process.
LVDS and Sub-LVDS combo IO library have data input and output cells along with an in-built bandgap voltage reference cell for biasing. Differential input IO pad operates at rail-to-rail common mode voltage with a resolution of as low input differential voltage as 50mV.
Memory card I/O pad supports interface signaling ranging from 1.2V to 3.3V while using 1.8V gate oxide IO devices. This bi-directional I/O pad supports eMMC and UHS-I SD card standards along with related similar standards. The library offers the end-user a choice of multiple drive strengths, slew rates and weak pull resistors.
"Our specialty IO platform gives great flexibility to SoC and IP companies using UMC 28nm technologies to pick off-the-shelf IO pads that match or exceed best power, performance and area in industry," said Sivaramakrishnan Subramanian, senior principal engineer at Krivi and a co-founder of the company. "We designed an ESD protection network that achieved 2kV to 8kV HBM and more than 10A CDM peak current performance in these libraries."
UMC 28HLP IO Alcor platform is ready to be licensed from Krivi. A fully characterized silicon report across all PVT conditions is provided along with the library.
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