Inphi unveils industry’s first 100-Gigabit Ethernet CMOS PHY solutions for next generation line cards
The IN112510 100GbE CMOS Gearbox (GB) and IN012525 100GbE CMOS Clock Data Recovery (CDR) chipsets will accelerate time-to-market for higher aggregate bandwidth systems while containing costs of next generation 100GbE line cards targeted for data center and enterprise networks.
Based on Inphi’s iPHY architecture announced in March 2011 the cost-effective, energy-efficient 100GbE links are aiming to become essential tools for data center and service provider networks, which are struggling to satisfy the global economy’s relentless hunger for more bandwidth. With service providers and data centers demanding technology with low power consumption, Inphi’s latest iPHY CMOS PHY solutions will enable them to easily upgrade to 100GbE networks while retaining a lower carbon footprint. By integrating multiple channels along with transmit and receive functions on a single IC, Inphi is able to double the levels of integration available from existing 100GbE PHY and CDR offerings.
“Inphi is first to sample the industry’s lowest power CMOS 100GbE Gearbox and CDR PHY semiconductors for line cards and modules enabling next generation 100G platforms,” said Siddharth Sheth, Vice President of Marketing for Inphi’s high-speed connectivity products. “Our industry-leading PHY design metrics – power, footprint, integration – position us to use these devices across data center, enterprise and service provider applications. As the market transitions away from the power hungry and area rich SiGe technology based CFP modules towards lower power, higher density CMOS based CFP and CFP2 line cards, Inphi’s PHY offerings will enable and lead that transition.”
The iPHY IN112510 is a single-chip, low-power PHY for 10:4 gearbox applications for 100GbE and OTU4 high-density 100 Gbps line cards with 25-28 Gbps electrical interfaces. Other technical features include:
- Supports 100G BASE-LR4/ER4 and OTU4 28Gbps operation for OTL4.4
- Optimized for low-latency to allow use in ultra low latency applications
- Programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control which allow performance to surpass IEEE CAUI, CEI-11G SR and CEI-28G VSR specifications
- Numerous self-test and loopback modes that allow diagnostic monitoring of channel and system parameters
- Eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing in a lab or production test environment
- Innovative package design that allows denser line cards
- Optimizations for next generation CFP2-based line card designs
- Single-chip low power solution that allows next generation optimized CFP modules
The iPHY IN012525 is a low-power CDR for 100GbE and OTU4 next generation 100G modules. This CDR features:
- Supports 100G BASE-LR4/ER4 and OTU4 28Gbps operation
- Programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control which allow performance to surpass CEI-28G VSR specifications
- Self-test modes that allow diagnostic monitoring of channel and system parameters
- Eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing in a lab or production test environment
- Optimizations for next generation CFP2 modules
Inphi is also introducing the new IN2841TA, a transimpedance amplifier (TIA)/limiting amplifier (LIA) for 100GbE receivers. Interoperable with Inphi’s iPHY 100GbE CMOS SerDes solutions, the Inphi IN2841TA offers the lowest power, best sensitivity, and highest overload. Together, the IN2841TA and iPHY CMOS SerDes create a platform solution for 100GbE CFP and CFP2 modules.
Inphi is showcasing the company’s next generation products in its Booth #1732 at the European Conference on Optical Communication (ECOC) 2011 in Geneva, Switzerland on September 19-21, 2011.
Visit Inphi at www.inphi.com
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