MENU

Integrated platform developments for software and hardware validation and test

Integrated platform developments for software and hardware validation and test

Feature articles |
By eeNews Europe



iTIC seamlessly integrates a complete on-chip debugger in the form of a TAP Interface Card (TIC) into the Scanflex ESA hardware platform, bringing together technologies for non-intrusive software and hardware validation and test with a high degree of compatibility. The iTIC, controlled via the TAP Interface cards’ internal standard interface, supports all procedures for software debugging as well as any technologies for Embedded System Access, such as Boundary Scan, Processor Emulation Test, FPGA Assisted Test and in-system programming of Flash and PLD.

iTIC is the seventh member in the TAP Interface Card (TIC) family, controlled via a differential interface; all existing installations can be simply upgraded. Differential coupling enables trouble-free data transfer up to 80 MHz over distances of up to 4m, without performance loss as runtime delays of cables and units under test (UUT) can be individually compensated, per TAP, by means of the ADYCS technology. The iTIC can be integrated into application critical environments such as In-Circuit test fixtures.

Designed as an active test head, the iTIC supports a multitude of different operations and process architectures. These include standards such as IEEE1149.1, IEEE1149.6, IEEE1149.7, IEEE1532 and IEEE-ISTO 5001, and numerous non-JTAG interfaces such as BDM (Background Debug Mode), SBW (Spy-Bi-Wire), SWD (Serial Wire Debug) and many more. The target interface can be completely galvanically isolated via relays.

iTIC is supported in the Cascon JTAG/Boundary Scan software System and automatically detected. Through OEM cooperation with vendors of In-Circuit testers (ICT), Manufacturing Defect Analysers (MDA), Flying Probers (FPT) and Functional Test systems (FCT), the new solution is available immediately for production test applications.

“The new iTIC is a highly important milestone for the holistic implementation of our Embedded System Access philosophy. The successful cooperation with our long-term, partner iSystem enables us to support a considerably higher number of microprocessors and, furthermore, exploit synergies between different applications to an even greater degree”, says Thomas Wenzel, Managing Director of Goepel electronic’s JTAG/Boundary Scan Division. “The opportunity to execute all procedures on one platform brings users added efficiency in design validation and flexibility in test throughout the entire product life cycle.”

“In recent years, we systematically extended our tools’ connectivity for embedded software development and test and associated partnerships with vendors of complementary products to create significant added values in operational efficiency and performance”, adds Erol Simsek, CEO with iSystem AG.

Goepel; www.goepel.com

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News

Share:

Linked Articles
10s