Integrated SoC development platform centres on RISC-V architecture

Integrated SoC development platform centres on RISC-V architecture

Partners |
By Graham Prophet

The platform proposes an open-standards-based solution to allow designers of systems-on-a-chip (SoCs) for IoT applications to get from concept to silicon with a high level of software integration in shorter time, and claims to substantially eliminate risk from the entire product development process.


This collaboration comprises a partnership bringing together;


BaySand’s foundational IP and Metal Configurable Standard Cell (MCSC) technology

Codasip’s extensible Codix Bk RISC-V-compliant processor implementation

Codeplay’s ComputeSuite software development tools for open standards middleware, and

UltraSoC’s on-chip debug and analytics architecture


The result, say the companies, is an end-to-end development flow that supports the rapid evolution of IoT systems, enabling timely market entry, in-market feature enhancement and on-going usability and cost optimization, all at the price points demanded in this highly cost-sensitive market.


“RISC-V adoption is accelerating, and the IoT is clearly an arena where an open, independent processor architecture offers very powerful advantages,” said Caroline Gabriel, Research Director of ReThink Research. “But as with any processor architecture, the RISC-V ISA needs a healthy, co-operative ecosystem surrounding it: an ecosystem that puts designers in control and empowers innovation.”


Rick O’Connor, Executive Director of the RISC-V Foundation, commented: “A key part of our mission at the RISC-V Foundation is to bring technology developers together, in a standards-based environment, to build a robust ecosystem around the RISC-V ISA. We’re delighted to see these four leading firms in the RISC-V community coming together to offer such a powerful solution.”


The new platform uses BaySand’s MCSC technology which aims to deliver the power, performance and density advantages of standard cell ASIC technology while reducing NRE and time to market (TTM) and increasing design flexibility. The company’s UltraShuttle multi project wafers (MPW) and MetalCopy FPGA porting technology help to bring new designs to market quickly, with low risk: they combine with a proven and predictable design flow and a rich IP library to create an ideal solution for IoT class designs.


At the IP level, Codasip’s Codix-Bk IP cores are the first commercially available RISC-V compliant processors, and are at the heart of the new joint platform offering. They are available in multiple configurations and can be customized to the exact needs of IoT designs via application analysis technology and a model-based IP structure.


UltraSoC contributes silicon IP and software tools that enable secure, non-intrusive monitoring and analysis of IoT device behaviour. These features ease the task of writing and debugging the software that is intrinsic to the operation of complex ICs; they accelerate first-time bring up of new devices; and the same IP allows robust hardware-based security features that can detect unexpected behaviour caused by bugs or by malicious interference (“Bare Metal Security”).


At the highest level within the new platform, Codeplay provides developers with an open standards based programming model that extends from device-specific functionalities all the way up to highly abstracted machine learning paradigms such as Google’s TensorFlow. ComputeSuite extends the RISC-V platform with OpenCL and SYCL allowing applications to target the underlying hardware for highest performance, using standard APIs.


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next page; comments from participating company execs…


Rupert Baines, CEO, UltraSoC: “We’re delighted to be coming together with three of the other key players in the RISC-V arena, BaySand, Codasip and Codeplay. Our aim in this collaboration is to enable accelerated product development cycles, lower costs and more agile development, in particular for IoT designs. Our technology helps SoC developers across the chip and throughout the development flow, and this partnership reinforces the strength of that offering.”


Karel Masarik, CEO, Codasip: “This collaboration is an important one for our customers as they look to replace proprietary ISA’s with RISC-V. It allows them to quickly bring new SoCs to life, while providing functionality that exceeds what they have had access to in the past. Our Codix-Bk series of RISC-V processor IP, with its LLVM-based development environment, make integration quick and low risk, demonstrating the power of commitment to open standards.”


Ehud (Udi) Yuhjtman, EVP marketing and Sales at BaySand: “BaySand is a supporter of open source hardware and we are excited to be part of this great team that brings together an open source ISA complete solution. This RISC-V implementation with the UltraSOC tools is a game changer that will enable designers and companies to design at an affordable budget their own efficient IoT ASIC and system. We are working on the ASIC implementation which will be available for evaluation to our customers and partners. The complete solution and technology provides the ability to build custom designs with BaySand special UltraShuttle MPW and the Metal Configurable Standard Cell (MCSC)”.


Andrew Richards, CEO, Codeplay: “Codeplay is excited to see RISC-V gaining in popularity and we are keen to ensure software developers are correctly equipped to host their software applications on it. Codeplay is working extensively with machine learning solutions such as Google with TensorFlow, and we will bridge the gap on RISC-V with the open standards OpenCL and SYCL.”



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