INTEGRITY-178 tuMP support for NXP i.MX 8 processors
INTEGRITY-178 tuMP’s bound multi-processing (BMP) and symmetric multi-processing (SMP) capabilities allow any application to be assigned to a dedicated core or a multi-threaded application to execute across multiple cores of a particular type to maximise multicore usage and minimise power consumption.
NXP i.MX 8 applications processors offer SWaP-optimised heterogeneous processing, quad 1080p display functionality, low soft-error rate, and product supply longevity, all of which are ideal for airborne applications. The devices feature four Cortex-A53 cores and two Cortex-A72 cores. Power consumption is optomized by matching the performance requirements of each application task to the performance capacities of the different cores. The low soft-error rate of i.MX 8 processors comes from the 28 nm FDSOI manufacturing process, which features high immunity to alpha particle flux and enables high MTBF.
The INTEGRITY-178 tuMP safety- and security-critical RTOS has been developed to simultaneously meet DO-178B/C design assurance level (DAL) A and the separation kernel protection profile (SKPP) as defined by the NSA. INTEGRITY-178 tuMP is a multicore RTOS with support for any mixture of asymmetric multi-processing (AMP), SMP, and BMP. Specifically, it includes support for running a multi-threaded DO-178C DAL A partition across multiple processor cores in SMP or BMP configurations as required in ARINC 653 Part 1, Supplements 4 and 5.
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