Intel, CEA-Leti to develop 2D material transfer for future transistors
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Chip giant Intel and Grenoble-based French research institute CEA-Leti have said they will collaborate to develop transistor technologies based on two-dimensional transition-metal dichalcogenides (TMDs).
These materials – such as molybdenum- and tungsten-based TMDs – are described as promising options for channel materials for scaled transistors. CEA-Leti and Intel have created a multi-year joint research project to develop layer transfer technology of two-dimensional transition-metal dichalcogenides (2D TMDs) on 300mm-diameter wafers. The technologies could be relevant to sub-nanometer manufacturing processes deployed beyond 2030, CEA-Leti said.
2D-layered semiconductors provide innate sub-nanometer transistor channel thickness making them suitable for high-performance and low-power platforms due to their good carrier transport and mobility, even for atomically thin layers. In addition, their device body thickness and moderate energy bandgap lead to enhanced electrostatic control, and thus, to low off-state currents.
These characteristics position 2D-FET stacked-nanosheet devices as a promising solution for transistor scaling beyond 2030, said CEA-Leti. However, this will require methods for 2D channel growth and transfer to silicon wafer technology.
The project’s goal is to create a viable process for the growth of high-quality 2D materials on 300mm substrates and their transfer to another device substrate for transistor process integration.
Pushing Moore’s Law
“As we are relentlessly pushing Moore’s Law, 2D TMD material is a promising option for extending the limits of transistor scaling in the future,” said Robert Chau, Intel senior fellow in technology development, in a statement issued by CEA-Leti.
Chau relocated from the US to Europe in 2022 to lead Intel’s European research and to drive the Intel’s R&D with partners on the continent.
CEA-Leti CEO Sebastien Dauvé said that due to the materials’ high-growth temperature, exceeding 700 degrees C, it is difficult to deposit stacks as thin layers and layer-transfer holds the most promise for integrating them in future devices.
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