Intel launches compact RISC-V Nios processor core
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By
Nick Flaherty
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Intel has launched a new, compact soft core for its FPGA devices based on the RISC-V open instruction set architecture.
The Nios V/c compact microcontroller is the smallest core in the family, following V/m microcontroller core and the V/g general purpose core.
- Opening up the Simics FPGA simulation platform
- Backing RISC-V for the Nios FPGA processor
- Intel kills its RISC-V Pathfinder development kit programme
- RISC-V in Intel 7nm foundry offering
The V/c core is based on the RV32I instruction set with no debug, interrupt controller or exception controller and so is aimed at non-interrupt-driven control applications on Intel FPGAs.
The Nios V/c compact core will initially target all the FPGA devices in Intel Quartus Prime Pro software with a roadmap to many devices supported in Quartus Prime Standard software. Quartus Prime is a programmable logic device design software.
The first Nios RISC-V core was launched in 2021 to update the original 32bit soft core developed by Altera.
Related RISC-V articles
- Intel taps Ashling for RISC-V development tools
- Codeplay teams with Andes Technology for RISC-V vector processor
- RISC-V gathers pace in Europe
- German AI RISC-V joint venture poses challenge to ARM
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