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Intel launches integrated EV chip

Intel launches integrated EV chip

Technology News |
By Nick Flaherty

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Silicon Mobility, now part of Intel, has developed a hybrid controller chip that combined FPGA and CPUs to consolidate functions in an electric vehicle.

The OLEA U310 system-on-chip (SoC) from Silicon Mobility in Sweden is designed with a hybrid and heterogeneous architecture to replace up to six standard microcontrollers in a system. This can control an inverter, a motor, a gearbox, a DC-DC converter and an on-board-charger in real time, reducing system complexity, power consumption and cost.

This is the second generation of field programmable control unit (FPCU) with three ARM Cortex-R52 real time microcontroller cores running at 350MHz to provide 2196 DMIPS alongside two Advanced Execution and Events Control (AxEC) units at 175MHz.

These are data processing and real-time control units based on programmable hardware and configurable peripherals supporting multiple parallel applications via multiple Flexible Logic Units (FLU) clusters.

The AxEC handles fast-response-time processing and real-time control, while CPUs manage high-level and low-response-time software. Designers can choose CPU or AxEC for specific tasks, but AxEC typically handles complex processing, reducing CPU usage. Hardware processing ensures rapid, precise responses, regardless of event volume or frequency.

The Safety Integrity Level (SILant) agent is a set of units and functionalities dedicated to the FPCU and the system functional safety ensuring ISO 26262 ASIL-D compliancy. This new generation has a deterministic multi-core and multi-FLU cluster which guarantees worst-case execution timing.

The Flexible Hardware Security Module (FHSM) is a sub-system dedicated to the cybersecurity of the FPCU integrating encryption/decryption accelerators and is compliant to EVITA Full and ISO 21434. It is combined with a hardware programmable cluster to support unidentified threats and strengthen security

The AEC-Q100 Grade 1 chip has 8MBof program flash, 256KB of data flash and 1MB of SRAM as well as CAN FD, CAN XL and Ethernet interfaces with a 292 pin BGA

In addition to the bill of material (BoM) reduction, early figures show up to 5% energy efficiency improvement, 25% motor downsizing for the same power, 35% less cooling need and up to 30 times less passive components.

The OLEA Composer design framework integrates with leading development tools throughout the V-Model design cycle, significantly accelerating the development process for OLEA FPCUs.

It supports various simulation environments from MiL to HiL and uses the hardware/software split within the OLEA U310 to dramatically reduce development, validation, and calibration times while achieving superior performance.

The OLEA LIB companion software library provides engineers with a modular set of pre-built, pre-tested functional blocks (reference and target models for MATLAB and Simulink) tailored to common powertrain control tasks. These building blocks offer increasing levels of performance and content based on specific customer and application needs. Models from OLEA LIB can be directly used within OLEA Composer for simulations and automatic code generation, further streamlining the development process.

The chip, on show at PCIM this week in Nuremberg, Germany, complements Intel Automotive’s existing family of AI-enhanced software-defined vehicle (SDV) SoCs for EVs and runs concurrent control algorithms for automotive power and energy application control developed by Silicon Mobility.

www.silicon-mobility.com

 

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