Poulson doubles to eight the number of cores and to 12 the number of instructions in flight in its pipeline. Intel declined to give any cost, availability or performance information on the 588mm2 chip.
OEMs say Poulson gets Intel back on a regular cadence of Itanium roll outs following a delay with the previous-generation chip Tukwilla. That processor, launched a year ago, was the first Itanium chip to embrace the same CPU interface and chip sets as Intel’s x86-based Xeon server processors.
Intel skipped a process technology generation to make Poulson in its 32nm process. Tukwilla was made in a 65nm process. Thanks to the new process technology, Poulson is actually 20 percent smaller than Tukwilla.
Poulson also revs up Intel’s Quick Path Interconnect, the CPU’s interface, to 6.4 GTransfers/second from 4.8 GTransfers/s on Tukwilla while remaining pin compatible. Poulson has 54 Mbytes of total cache, including a 32 Mbyte shared cache.
Users should not have to recompile software to get the advantage of Poulson’s new 12-issue pipeline. However, Intel has yet to complete software testing of the chip.
"We are still in our post-silicon phase and to date and have testing to do, but we haven’t seen any issues," said Rory M. McInerney, director of Intel’s server CPU team.
The Itanium family is focused on Unix and mainframe applications, in contrast to Xeon which aims at Windows, Linux and Solaris server apps.
Thanks to the pin-compatible nature of Poulson, Hewlett-Packard will reuse in its Poulson servers the same SX3000 chip set it designed for Tukwilla. The three-chip sets supports hard partitioning of jobs in some systems, end-to-end retry capabilities and built-in error detection and correction.
"We are waiting for more details from Intel on its Paulson follow on [code named Kittson] to determine what we do with next chip set," said Michael McBride, an engineering manager in HP Business Critical Systems group.
Poulson is one of many processors that will be described at ISSCC this week.