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Intel, Samsung, TSMC to drive chip packaging forward

Intel, Samsung, TSMC to drive chip packaging forward

Market news |
By Peter Clarke



The advanced chip packaging market was worth about $29 billion in 2019 out of a total packaging market worth $68 billion. Advanced packaging will grow at a compound annual growth rate (CAGR) of 6.6 percent between 2019 and 2025, according to the market analyst.

The adoption of advanced packaging is being driven by a slow down in Moore’s Law and heterogeneous integration along with megatrends including 5G, AI, high-performance computing and the Internet of Things. It is also driven by those chip makers closest to the leading-edge, TSMC, Samsung and Intel. As result advanced packaging will represent about 50 percent of the packaging market by 2025.

Advanced packaging market growth by wafers and by technology 2019 to 2025. Source: Yole Developpement.

Of the advanced packaging total in 2019, ICs or consumer and mobile applications were responsible for 85 percent but it will grow at a slightly lower than average rate – 5.5 percent – as other sectors are drawn in to take the benefits of advanced packaging at lower volumes.

Next: Ranking of OSATs


However, the advanced packaging market will decrease in 2020 by 7 percent while the traditional packaging market will decrease by 15 percent due to the impact of the Covid-19 pandemic on the semiconductor market.

Top 25 packaging houses (OSATs) by 2019 revenue (in $M). Source: Yole Developpement.

In the longer term Yole reckons the traditional packaging market will grow with a CAGR2019-2025 of 1.9 percent and the total packaging market will grow with a CAGR2019-2025 of 4 percent to reach $43 billion and $85 billion, respectively.

Next: Three players left


In terms of packaging format, the highest CAGRs will be experienced by 2.5D/3D, embedded die, and fan-out with 21, 18 and 16 percent respectively.

Technology roadmap for advanced packaging 2015 to 2025. Source: Yole Developpement.

Ruurd Boomsma, CTO of packaging equipment supplier BESI, commented: “A new era of advanced packaging is at our doorstep. From advanced flip-chip and fan out technologies, now new and more advanced technologies are needed for assembly of double-sided SiP, as well new TCB and hybrid bonding solutions for complex heterogenous packaging are required. This in combination with different carriers for Known Good dies – trays, TnR, reconstructed wafer – and other interposers – wafer, panel, substrate – opens opportunities for new, innovative and cost effective, equipment that offer very high accuracy, high yield and high speed.”

Related links and articles:

www.yole.fr

News articles:

TSMC leads the fan-out packaging boom

Chiplet-savvy TSMC to build $10 billion assembly and test plant

ASE dominates top 25 ranking of chip packagers

TSMC preps for ‘chiplet’ style manufacturing in 2021

Birth of chiplet market shows more than 40% annual growth

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