Intel tools front-end FPGA accelerator programming for software teams
Noting (in a blog posting, see link below) that FPGAs have been, “speciality products programmed in exotic languages by elite experts with detailed, system-specific knowledge,” the company, “seeks to democratize FPGA acceleration, broaden their use and ease adoption in the data center. The rare expertise of FPGA programming was a serious inhibitor to widespread adoption. “
There are three specific tools in the announcement; The Acceleration Stack for Intel Xeon CPU with FPGAs; The Open Programmable Acceleration Engine (OPAE) Technology; and The Intel FPGA Software Development Kit (SDK) for OpenCL*
A major part of this announcement appears to be concerned with making the features offered by OpenCL, more accessible. The blog post notes that, “OpenCL is an industry standard, C-based programming language that allows users to abstract away hardware-specific development and use a higher-level software development flow that accelerates time-to-market. We see customers using OpenCL with Intel FPGAs reduce their development time to weeks instead of months. OpenCL can help a developer reduce the amount of accelerator code dramatically, when compared to traditional means of FPGA development.”
This very much echoes the aspirations that have been expressed for it since its inception; however, despite the aim of having a seamless algorithm-in to custom-programmed-hardware design flow, it has remained largely one more tool in the FPGA specialist’s toolkit. Intel’s vision of how the process of creating function-on-demand, optimised hardware is evolving is pictured in these two, before- and after-, flow charts;
Read Intel’s blog posting here.
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