Intel’s Stratix 10 MX FPGAs first to integrate HBM2 for acceleration
These bandwidth capabilities turn the new FPGAs into essential multi-function accelerators for high-performance computing (HPC), data centres, network functions virtualization (NFV), and broadcast applications that require hardware accelerators to speed-up mass data movements and stream data pipeline frameworks.
In HPC environments, the ability to compress and decompress data before or after mass data movements is paramount. HBM2-based FPGAs can compress and accelerate larger data movements compared with stand-alone FPGAs. With High Performance Data Analytics (HPDA) environments, streaming data pipeline frameworks like Apache Kafka and Apache Spark Streaming require real-time hardware acceleration. Intel Stratix 10 MX FPGAs can simultaneously read/write data and encrypt/decrypt data in real-time without burdening the host CPU resources.
With the integrated HBM2, the Intel Stratix 10 MX FPGA family provides a maximum memory bandwidth of 512 gigabytes per second. HBM2 vertically stacks DRAM layers using silicon via (TSV) technology. These DRAM layers sit on a base layer that connects to the FPGA using high density micro bumps.
The new FPGAs implement Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) that speeds communication between FPGA fabric and the DRAM. EMIB works to efficiently integrate HBM2 with a high-performance monolithic FPGA fabric, solving the memory bandwidth bottleneck in a power-efficient manner.
Several variants of the Intel Stratix 10 FPGA family are shipping now, including the Intel Stratix 10 GX FPGAs (with 28G transceivers) and the Intel Stratix 10 SX FPGAs (with embedded quad-core ARM processor). All are built using Intel’s 14nm FinFET manufacturing process.
Intel – www.intel.com
Related article:
Intel samples Stratix 10 FPGAs on 14nm node
Altera: Stratix 10 MX devices solve the memory bandwidth challenge
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
