MENU

IP builds configurable CAN bus controller with flexible data-rate

IP builds configurable CAN bus controller with flexible data-rate

New Products |
By Graham Prophet



The improved protocol overcomes standard CAN limits: data can be transmitted faster than with 1 Mbps (up to 8Mbps) and the payload (data field) is up to 64 Byte long. When only one node is transmitting, the bit-rate can be increased, because no nodes need to be synchronized. Standard CAN requirements, DCD observes, become insufficient in modern automotive. The carmakers demand more bandwidth and more throughputs for most CAN-based in-vehicle networks. The DCAN FD IP Core is also a good alternative for non-automotive projects where not the increasing speed is the target. The longer payload (more than 8 Byte) becomes crucial then.

The core has a simple CPU interface (8/16/32 bit configurable data width), with small or big endian addressing scheme. Hardware message filtering and 128 byte receive FIFO enable back-to-back message reception, with minimum CPU load. The DCAN FD is described at RTL level, allowing target use in FPGA or ASIC technologies.
 

DCD: https://dcd.pl/ipcore/131/dcan-fd/

 

next page; feature listing…


Key features:

Designed in accordance to ISO 11898-1:2015

Supports CAN 2.0B and CAN FD frames

Support up to 64 bytes data frames

Flexible data-rates supported

8/16/32-bit CPU slave interface with small or big endianness

Simple interface allows easy connection to CPU

Supports both standard (11-bit identifier) and extended (29 bit identifier) frames

Data rate up to 8 Mbps

Hardware message filtering (dual/single filter)

128 byte receive FIFO and transmit buffer

Overload frame is generated on FIFO overflow

Normal & Listen Only Mode

Transceiver Delay Compensation up to three data bit long

Single Shot transmission

Ability to abort transmission

Readable error counters

Last Error Code

Fully synthesizable

Static synchronous design with positive edge clocking and synchronous reset

No internal tri-states

Scan test ready

Available system interface wrappers:

AMBA – APB Bus

Altera Avalon Bus

Xilinx OPB Bus

 

 

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News

Share:

Linked Articles
10s