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IP builds RFID function with 90% power reduction

IP builds RFID function with 90% power reduction

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By eeNews Europe



The challenge of improving RFID reader detection range and thus the identification rate, mean that the chips must be able to operate at extremely low voltage, as the energy captured by the antenna is reduced. Hence the need to consider every means of reducing the RFID chips power consumption: one path is to optimize the digital part of the design.

 

The latest generation of Dolphin’s SESAME eLC standard-cell library at 180 nm is designed to safely operate near threshold voltage, down to 0.68 V ±10%, to provide up to 90% of power savings at 1.3 MHz over previous implementations. This comparison is based on the Motu-Uta benchmark to provide an objective metric to quickly assess the expected improvement – Motu-Uta is downloadable on the Dolphin Integration website with no need for NDA.

 

The chart above shows SESAME eLC compared to a conventional standard-cell library (xluency) in a 180 nm RFID process.

 

Dolphin Integration; www.dolphin.fr

 

 

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