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IP cuts audio codec silicon area by 40% for wireless device SoCs

IP cuts audio codec silicon area by 40% for wireless device SoCs

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By eeNews Europe



This product leverages the high density of a pure logic PMW modulator (40% area reduction at 65 nm compared to a mixed-signal CODEC) with the advantage of the high dynamic range of a mixed-signal ADC. Its ultra-low silicon area, close to one square millimeter, contributes to positioning the sCODa-MT1-LR.01 as the leading converter for cost-effectiveness, Dolphin believes.

sCODa-MT1-LR.01 features:

– One ADC channel with analogue microphone circuitry

– One digital microphone input channel

– Automatic Gain Control (AGC) preventing audio signal saturation on the microphone input

– Wind noise filters to reduce environment disturbances and to enhance voice quality

– PLL-less feature protecting audio signals against any performance drop due to jittered clock issues

– Two DAC channels (R/L) with Pulse Width Modulation (PWM) for speaker or headphone outputs

This product is delivered with a handbook of reference application schematics helping to select external components for a large range of output types (e.g. headphone, speaker, line-out) and performances. This provides guidelines for helping users optimise the cost/performance trade-offs with confidence in well-proven results.

The IP realises;

– Low silicon area using a pure logic PWM DAC

– High SNR, up to 105 dB A-weighted on the DAC (depending on the sound amplifier); 90 dB A-weighted on ADC

– THD of -90 dB on DAC, and -80 dB on ADC

– Wide sampling frequency range: 8 kHz to 192 kHz

The product is available at 65 nm at TSMC, but is easily retargetable from 130 nm to 28 nm at leading foundry processes.

Dolphin Integration; www.dolphin-ip.com

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