IP for programmable interrupt controller
The D8259 is a soft core Programmable Interrupt Controller, that can manage up to 8-vectored priority interrupts for the processor, and that you can also program to cascade and gain up to 64 vectored interrupts. More than 64 vectored interrupts are possible by programming the D8259 to the Poll Command Mode. The D8259 Package includes a fully automated testbench to validate the whole package at each stage of SoC design flow. The technology independent design can be implemented in a variety of process technologies. The D8259 can operate in all 82C59A modes and it supports all 82C59A features: MCS80/85 and 8088/8086 processor modes;
Fully nested mode and special fully nested mode
Special mask mode
Buffered mode
Pool command mode
Cascade mode with master or slave selection
Automatic end of interrupt mode
Specific and non specific end of interrupt commands
Automatic and Specific Rotation
Edge and level triggered interrupt input modes
Reading of interrupt request register (IIR) and in service register (ISR) through data bus.
Writing and reading of interrupt mask register (IMR) through data bus.
The D8259’s key features are:
8 vectored priority interrupts
Up to sixty-four vectored priority interrupts with cascading
Support for all 82C59A modes features
MCS-80/85 and 8088/8086 processor modes
Fully nested mode and special fully nested mode
Special mask mode
Buffered mode
Pool command mode
Cascade mode with master or slave selection
Automatic end-of-interrupt mode
Specific and non-specific end-of-interrupt commands
Automatic and Specific Rotation
Edge and level triggered interrupt input modes
Reading of interrupt request register (IIR) and in-service register (ISR) through data bus
Fully synthesisable HDL Source Code
Static design and no internal tri-states
DCD https://dcd.pl/ipcore/134/d8259/
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